Re: [PATCH] clk: qcom: gcc-ipq806x: use parent_data for the last remaining entry

[Christian Marangi <ansuelsmth@gmail.com>]

On Tue, Jun 21, 2022 at 08:00:26PM +0300, Dmitry Baryshkov wrote:
> On Tue, 21 Jun 2022 at 18:21, Christian Marangi <ansuelsmth@gmail.com> wrote:
> >
> > On Tue, Jun 21, 2022 at 12:51:50AM +0300, Dmitry Baryshkov wrote:
> > > Use parent_data for the last remaining entry (pll4). This clock is
> > > provided by the lcc device.
> > >
> > > Fixes: cb02866f9a74 ("clk: qcom: gcc-ipq806x: convert parent_names to parent_data")
> > > Cc: Ansuel Smith <ansuelsmth@gmail.com>
> > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > > ---
> > >  drivers/clk/qcom/gcc-ipq806x.c | 4 +++-
> > >  1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
> > > index 718de17a1e60..6447f3e81b55 100644
> > > --- a/drivers/clk/qcom/gcc-ipq806x.c
> > > +++ b/drivers/clk/qcom/gcc-ipq806x.c
> > > @@ -79,7 +79,9 @@ static struct clk_regmap pll4_vote = {
> > >       .enable_mask = BIT(4),
> > >       .hw.init = &(struct clk_init_data){
> > >               .name = "pll4_vote",
> > > -             .parent_names = (const char *[]){ "pll4" },
> > > +             .parent_data = &(const struct clk_parent_data){
> > > +                     .fw_name = "pll4", .name = "pll4",
> > > +             },
> > >               .num_parents = 1,
> > >               .ops = &clk_pll_vote_ops,
> > >       },
> > > --
> > > 2.35.1
> > >
> >
> > Hi my intention was finding a way to directly reference the hw clk from
> > the lcc driver instead of using fw_name/name parent data. Wonder if that
> > would be a better solution... Seems wrong to me to eventually add also
> > the pll4 clk in the dts to correctly use the fw_name definition (when
> > that will be fixed in the ipq8064 dtsi)
> 
> Please don't. They are two separate hardware pieces, two separate
> drivers. Please don't invent anything fancy. Let the OF clk code
> handle it.
> Yes, this will result in "pll4" clock being referenced in DT. We
> already have binding for that, <&lcc PLL4>.
>

Oh ok. Thanks for the clarification, no problem for me. Just another clk to
add to the gcc node in the dtsi.

> -- 
> With best wishes
> Dmitry

-- 
	Ansuel