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[93.42.70.190]) by smtp.gmail.com with ESMTPSA id s3-20020a1709067b8300b0070efa110afcsm8919142ejo.83.2022.06.30.04.20.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jun 2022 04:20:09 -0700 (PDT) Message-ID: <62bd86e9.1c69fb81.0796.06ac@mx.google.com> X-Google-Original-Message-ID: Date: Thu, 30 Jun 2022 13:20:07 +0200 From: Christian Marangi To: Dmitry Baryshkov Cc: Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Jens Axboe , Greg Kroah-Hartman , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v4 3/5] dt-bindings: arm: msm: Rework kpss-gcc driver Documentation to yaml References: <20220629121441.6552-1-ansuelsmth@gmail.com> <20220629121441.6552-4-ansuelsmth@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On Thu, Jun 30, 2022 at 09:43:05AM +0300, Dmitry Baryshkov wrote: > > > On 29 June 2022 15:14:39 GMT+03:00, Christian Marangi wrote: > >Rework kpss-gcc driver Documentation to yaml Documentation. > >The current kpss-gcc Documentation have major problems and can't be > >converted directly. Introduce various changes to the original > >Documentation. > > > >Add #clock-cells additional binding as this clock outputs a static clk > >named acpu_l2_aux with supported compatible. > >Only some compatible require and outputs a clock, for the others, set > >only the reg as a required binding to correctly export the kpss-gcc > >registers. As the reg is shared also add the required syscon compatible. > > > >Signed-off-by: Christian Marangi > >--- > > .../bindings/arm/msm/qcom,kpss-gcc.txt | 44 --------- > > .../bindings/arm/msm/qcom,kpss-gcc.yaml | 90 +++++++++++++++++++ > > 2 files changed, 90 insertions(+), 44 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt > > create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml > > > >diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt > >deleted file mode 100644 > >index e628758950e1..000000000000 > >--- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt > >+++ /dev/null > >@@ -1,44 +0,0 @@ > >-Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) > >- > >-PROPERTIES > >- > >-- compatible: > >- Usage: required > >- Value type: > >- Definition: should be one of the following. The generic compatible > >- "qcom,kpss-gcc" should also be included. > >- "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" > >- "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" > >- "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" > >- "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" > >- > >-- reg: > >- Usage: required > >- Value type: > >- Definition: base address and size of the register region > >- > >-- clocks: > >- Usage: required > >- Value type: > >- Definition: reference to the pll parents. > >- > >-- clock-names: > >- Usage: required > >- Value type: > >- Definition: must be "pll8_vote", "pxo". > >- > >-- clock-output-names: > >- Usage: required > >- Value type: > >- Definition: Name of the output clock. Typically acpu_l2_aux indicating > >- an L2 cache auxiliary clock. > >- > >-Example: > >- > >- l2cc: clock-controller@2011000 { > >- compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; > >- reg = <0x2011000 0x1000>; > >- clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; > >- clock-names = "pll8_vote", "pxo"; > >- clock-output-names = "acpu_l2_aux"; > >- }; > >diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml > >new file mode 100644 > >index 000000000000..27f7df7e3ec4 > >--- /dev/null > >+++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.yaml > >@@ -0,0 +1,90 @@ > >+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > >+%YAML 1.2 > >+--- > >+$id: http://devicetree.org/schemas/arm/msm/qcom,kpss-gcc.yaml# > >+$schema: http://devicetree.org/meta-schemas/core.yaml# > >+ > >+title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) > >+ > >+maintainers: > >+ - Christian Marangi > >+ > >+description: | > >+ Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used > >+ to control L2 mux (in the current implementation) and provide access > >+ to the kpss-gcc registers. > >+ > >+properties: > >+ compatible: > >+ items: > >+ - enum: > >+ - qcom,kpss-gcc-ipq8064 > >+ - qcom,kpss-gcc-apq8064 > >+ - qcom,kpss-gcc-msm8974 > >+ - qcom,kpss-gcc-msm8960 > >+ - qcom,kpss-gcc-msm8660 > >+ - qcom,kpss-gcc-mdm9615 > >+ - const: qcom,kpss-gcc > >+ - const: syscon > >+ > >+ reg: > >+ maxItems: 1 > >+ > >+ clocks: > >+ items: > >+ - description: phandle to pll8_vote > >+ - description: phandle to pxo_board > >+ > >+ clock-names: > >+ items: > >+ - const: pll8_vote > >+ - const: pxo > >+ > >+ '#clock-cells': > >+ const: 0 > >+ > >+required: > >+ - compatible > >+ - reg > >+ > >+if: > >+ properties: > >+ compatible: > >+ contains: > >+ enum: > >+ - qcom,kpss-gcc-ipq8064 > >+ - qcom,kpss-gcc-apq8064 > >+ - qcom,kpss-gcc-msm8974 > >+ - qcom,kpss-gcc-msm8960 > >+then: > >+ required: > >+ - clocks > >+ - clock-names > >+ - '#clock-cells' > >+else: > >+ properties: > >+ clock: false > >+ clock-names: false > >+ '#clock-cells': false > > I suppose this chunk is not so correct. We can not describe these properties as required since current DTs do not have them. Also if somebody decides to fix the mdm9615 or msm8660 platforms, he works have to change this (again). Thus I'd just leave this whole chunk out. > With a quick check I notice that all the other platform doesn't have pxo_board or PLL8_VOTE clk so they wouln't work with the current driver... to me it seems they are just exposing the kpss-gcc reg with syscon and they are used in the rpm driver... This is very similar to the acc-v1 and acc-v2 separation where acc-v2 only provide the reg and nothing else. Wonder if we should do the same here or add clk support only for the specific compatible as I did here... In both case dts changes are required and a similar chunk is necessary. > >+ > >+additionalProperties: false > >+ > >+examples: > >+ - | > >+ #include > >+ > >+ clock-controller@2011000 { > >+ compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon"; > >+ reg = <0x2011000 0x1000>; > >+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>; > >+ clock-names = "pll8_vote", "pxo"; > >+ #clock-cells = <0>; > >+ }; > >+ > >+ - | > >+ clock-controller@2011000 { > >+ compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon"; > >+ reg = <0x02011000 0x1000>; > >+ }; > >+... > >+ > > -- > With best wishes > Dmitry -- Ansuel