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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id r4-20020a056512102400b004f24db9248dsm656008lfr.141.2023.05.19.09.52.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 19 May 2023 09:52:54 -0700 (PDT) Message-ID: <634c80b4-5007-4f66-9114-1dedf3c95f1f@linaro.org> Date: Fri, 19 May 2023 18:52:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 4/4] arm64: dts: qcom: sm8550: Add camera clock controller Content-Language: en-US To: Jagadeesh Kona , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Bjorn Andersson , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das , Satya Priya Kakitapalli References: <20230519155602.6642-1-quic_jkona@quicinc.com> <20230519155602.6642-5-quic_jkona@quicinc.com> From: Konrad Dybcio In-Reply-To: <20230519155602.6642-5-quic_jkona@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 19.05.2023 17:56, Jagadeesh Kona wrote: > Add device node for camera clock controller on Qualcomm > SM8550 platform. > > Signed-off-by: Jagadeesh Kona > Signed-off-by: Taniya Das > --- > arch/arm64/boot/dts/qcom/sm8550.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi > index e67e7c69dae6..ac82d3774ed8 100644 > --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi > @@ -4,6 +4,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -2397,6 +2398,20 @@ opp-202000000 { > }; > }; > > + camcc: clock-controller@ade0000 { > + compatible = "qcom,sm8550-camcc"; > + reg = <0 0xade0000 0 0x20000>; Please pad the non-zero address part to 8 hex digits Konrad > + clocks = <&bi_tcxo_div2>, > + <&bi_tcxo_ao_div2>, > + <&sleep_clk>, > + <&gcc GCC_CAMERA_AHB_CLK>; > + power-domains = <&rpmhpd SM8550_MMCX>; > + required-opps = <&rpmhpd_opp_low_svs>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + #power-domain-cells = <1>; > + }; > + > mdss: display-subsystem@ae00000 { > compatible = "qcom,sm8550-mdss"; > reg = <0 0x0ae00000 0 0x1000>;