* [PATCH 2/4] arm64: dts: qcom: sm8450: Adjust memory map
2022-07-13 20:10 [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Konrad Dybcio
@ 2022-07-13 20:10 ` Konrad Dybcio
2022-07-13 20:10 ` [PATCH 3/4] arm64: dts: qcom: sm8450: Add SDHCI2 Konrad Dybcio
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Konrad Dybcio @ 2022-07-13 20:10 UTC (permalink / raw)
To: ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Konrad Dybcio, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree,
linux-kernel
Fix up the camera region (cross-referenced different vendors' msm-5.10
drops, 9f500000 is the default location for SM8450) and reserve the
second chunk occupied by xbl_sc.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 7d08fad76371..09e7587de0de 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -436,11 +436,6 @@ cdsp_secure_heap: memory@80c00000 {
no-map;
};
- camera_mem: memory@85200000 {
- reg = <0x0 0x85200000 0x0 0x500000>;
- no-map;
- };
-
video_mem: memory@85700000 {
reg = <0x0 0x85700000 0x0 0x700000>;
no-map;
@@ -503,6 +498,11 @@ cvp_mem: memory@9ee00000 {
no-map;
};
+ camera_mem: memory@9f500000 {
+ reg = <0x0 0x9f500000 0x0 0x800000>;
+ no-map;
+ };
+
rmtfs_mem: memory@9fd00000 {
compatible = "qcom,rmtfs-mem";
reg = <0x0 0x9fd00000 0x0 0x280000>;
@@ -512,6 +512,11 @@ rmtfs_mem: memory@9fd00000 {
qcom,vmid = <15>;
};
+ xbl_sc_mem2: memory@a6e00000 {
+ reg = <0x0 0xa6e00000 0x0 0x40000>;
+ no-map;
+ };
+
global_sync_mem: memory@a6f00000 {
reg = <0x0 0xa6f00000 0x0 0x100000>;
no-map;
--
2.37.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/4] arm64: dts: qcom: sm8450: Add SDHCI2
2022-07-13 20:10 [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Konrad Dybcio
2022-07-13 20:10 ` [PATCH 2/4] arm64: dts: qcom: sm8450: Adjust memory map Konrad Dybcio
@ 2022-07-13 20:10 ` Konrad Dybcio
2022-07-14 11:13 ` Krzysztof Kozlowski
2022-07-13 20:10 ` [PATCH 4/4] arm64: dts: qcom: Add device tree for Sony Xperia 1 IV Konrad Dybcio
2022-07-14 11:12 ` [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Krzysztof Kozlowski
3 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2022-07-13 20:10 UTC (permalink / raw)
To: ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Konrad Dybcio, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, linux-arm-msm, devicetree,
linux-kernel
Add and configure the SDHCI host responsible for (mostly) SD Card and
its corresponding pins' sleep states.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 59 ++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 09e7587de0de..daea2fe7f83d 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -2355,6 +2355,26 @@ tlmm: pinctrl@f100000 {
gpio-ranges = <&tlmm 0 0 211>;
wakeup-parent = <&pdc>;
+ sdc2_sleep_state: sdc2-sleep {
+ clk {
+ pins = "sdc2_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data {
+ pins = "sdc2_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+ };
+
pcie0_default_state: pcie0-default-state {
perst {
pins = "gpio94";
@@ -3101,6 +3121,45 @@ ufs_mem_phy_lanes: phy@1d87400 {
};
};
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_AHB_CLK>,
+ <&gcc GCC_SDCC2_APPS_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "iface", "core", "xo";
+ resets = <&gcc GCC_SDCC2_BCR>;
+ interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
+ <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
+ interconnect-names = "sdhc-ddr","cpu-sdhc";
+ iommus = <&apps_smmu 0x4a0 0x0>;
+ power-domains = <&rpmhpd SM8450_CX>;
+ operating-points-v2 = <&sdhc2_opp_table>;
+ bus-width = <4>;
+ dma-coherent;
+
+ status = "disabled";
+
+ sdhc2_opp_table: sdhc2-opp-table {
+ compatible = "operating-points-v2";
+
+ opp-100000000 {
+ opp-hz = /bits/ 64 <100000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-202000000 {
+ opp-hz = /bits/ 64 <202000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+ };
+ };
+
usb_1: usb@a6f8800 {
compatible = "qcom,sm8450-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
--
2.37.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 3/4] arm64: dts: qcom: sm8450: Add SDHCI2
2022-07-13 20:10 ` [PATCH 3/4] arm64: dts: qcom: sm8450: Add SDHCI2 Konrad Dybcio
@ 2022-07-14 11:13 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-07-14 11:13 UTC (permalink / raw)
To: Konrad Dybcio, ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, linux-arm-msm, devicetree, linux-kernel
On 13/07/2022 22:10, Konrad Dybcio wrote:
> Add and configure the SDHCI host responsible for (mostly) SD Card and
> its corresponding pins' sleep states.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 59 ++++++++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 09e7587de0de..daea2fe7f83d 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -2355,6 +2355,26 @@ tlmm: pinctrl@f100000 {
> gpio-ranges = <&tlmm 0 0 211>;
> wakeup-parent = <&pdc>;
>
> + sdc2_sleep_state: sdc2-sleep {
> + clk {
> + pins = "sdc2_clk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + cmd {
> + pins = "sdc2_cmd";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + data {
> + pins = "sdc2_data";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> + };
> +
> pcie0_default_state: pcie0-default-state {
> perst {
> pins = "gpio94";
> @@ -3101,6 +3121,45 @@ ufs_mem_phy_lanes: phy@1d87400 {
> };
> };
>
> + sdhc_2: sdhci@8804000 {
> + compatible = "qcom,sm8450-sdhci", "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_AHB_CLK>,
> + <&gcc GCC_SDCC2_APPS_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "iface", "core", "xo";
> + resets = <&gcc GCC_SDCC2_BCR>;
> + interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>,
> + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>;
> + interconnect-names = "sdhc-ddr","cpu-sdhc";
> + iommus = <&apps_smmu 0x4a0 0x0>;
> + power-domains = <&rpmhpd SM8450_CX>;
> + operating-points-v2 = <&sdhc2_opp_table>;
> + bus-width = <4>;
> + dma-coherent;
> +
> + status = "disabled";
> +
> + sdhc2_opp_table: sdhc2-opp-table {
This does not match the bindings. Just "opp-table".
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 4/4] arm64: dts: qcom: Add device tree for Sony Xperia 1 IV
2022-07-13 20:10 [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Konrad Dybcio
2022-07-13 20:10 ` [PATCH 2/4] arm64: dts: qcom: sm8450: Adjust memory map Konrad Dybcio
2022-07-13 20:10 ` [PATCH 3/4] arm64: dts: qcom: sm8450: Add SDHCI2 Konrad Dybcio
@ 2022-07-13 20:10 ` Konrad Dybcio
2022-07-14 11:16 ` Krzysztof Kozlowski
2022-07-14 11:12 ` [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Krzysztof Kozlowski
3 siblings, 1 reply; 7+ messages in thread
From: Konrad Dybcio @ 2022-07-13 20:10 UTC (permalink / raw)
To: ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Konrad Dybcio, Andy Gross, Bjorn Andersson,
Rob Herring, Krzysztof Kozlowski, Kees Cook, Anton Vorontsov,
Colin Cross, Tony Luck, linux-arm-msm, devicetree, linux-kernel
Add support for Sony Xperia 1 IV, a.k.a PDX223. This device is a part
of the SoMC SM8450 Nagara platform and currently it is the only
device based on that board, so no -common DTSI is created until (if?)
other Nagara devices appear.
This commit brings support for:
* SD Card
* USB (*including SuperSpeed*)
* ADSP/CDSP/SLPI (modem remains untested for now)
* Most regulators (some GPIO-enabled ones require PMIC GPIOs but
trying to access any SPMI device crashes the device..)
* Part of I2C-connected peripherals (notably no touch due to a
driver bug)
* PCIe0 (PCIe1 is unused)
Do note display via simplefb is not supported, as the display is blanked
upon exiting XBL.
To create a working boot image, you need to run:
cat arch/arm64/boot/Image.gz arch/arm64/boot/dts/qcom/sm8450-sony-xperia-\
nagara-pdx223.dtb > .Image.gz-dtb
mkbootimg \
--kernel .Image.gz-dtb \
--ramdisk some_initrd.img \
--pagesize 4096 \
--base 0x0 \
--kernel_offset 0x8000 \
--ramdisk_offset 0x1000000 \
--tags_offset 0x100 \
--cmdline "SOME_CMDLINE" \
--dtb_offset 0x1f00000 \
--header_version 1 \
--os_version 12 \
--os_patch_level 2022-06 \ # or newer
-o boot.img-sony-xperia-pdx223
Then, you need to flash it on the device and get rid of all the
vendor_boot/dtbo mess:
// You have to either pull vbmeta{"","_system"} from
// /dev/block/bootdevice/by-name/ or build one as a part of AOSP build process
fastboot --disable-verity --disable-verification flash vbmeta vbmeta.img
fastboot --disable-verity --disable-verification flash vbmeta_system \
vbmeta_system.img
fastboot flash boot boot.img-sony-xperia-pdx223
fastboot erase vendor_boot
fastboot erase recovery
fastboot flash dtbo emptydtbo.img
fastboot reboot
Where emptydtbo.img is a tiny file that consists of 2 bytes (all zeroes), doing
a "fastboot erase" won't cut it, the bootloader will go crazy and things will
fall apart when it tries to overlay random bytes from an empty partition onto a
perfectly good appended DTB.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
---
arch/arm64/boot/dts/qcom/Makefile | 1 +
.../qcom/sm8450-sony-xperia-nagara-pdx223.dts | 635 ++++++++++++++++++
2 files changed, 636 insertions(+)
create mode 100644 arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 01773f3ce57f..157ef6958e1f 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -126,3 +126,4 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8350-sony-xperia-sagami-pdx214.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8350-sony-xperia-sagami-pdx215.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-hdk.dtb
dtb-$(CONFIG_ARCH_QCOM) += sm8450-qrd.dtb
+dtb-$(CONFIG_ARCH_QCOM) += sm8450-sony-xperia-nagara-pdx223.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
new file mode 100644
index 000000000000..38a3abd1fadb
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8450-sony-xperia-nagara-pdx223.dts
@@ -0,0 +1,635 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) 2022, Konrad Dybcio <konrad.dybcio@somainline.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include "sm8450.dtsi"
+
+/delete-node/ &adsp_mem;
+/delete-node/ &rmtfs_mem;
+/delete-node/ &video_mem;
+
+/ {
+ model = "Sony Xperia 1 IV";
+ compatible = "sony,pdx223", "qcom,sm8450";
+ chassis-type = "handset";
+
+ aliases {
+ serial0 = &uart7;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reserved-memory {
+ adsp_mem: memory@85700000 {
+ reg = <0x0 0x85700000 0x0 0x2800000>;
+ no-map;
+ };
+
+ video_mem: memory@9fd00000 {
+ reg = <0x0 0x9fd00000 0x0 0x700000>;
+ no-map;
+ };
+
+ rmtfs_mem: memory@f3300000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0xf3300000 0x0 0x280000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
+ ramoops@ffc00000 {
+ compatible = "ramoops";
+ reg = <0 0xffc00000 0 0x200000>;
+ console-size = <0x40000>;
+ record-size = <0x1000>;
+ ecc-size = <16>;
+ no-map;
+ };
+ };
+
+ /* Sadly, the voltages for these GPIO regulators are unknown. */
+ imx650_vana_vreg: imx650-vana-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "imx650_vana_vreg";
+ gpio = <&tlmm 23 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vph_pwr: vph-pwr-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vph_pwr";
+ regulator-min-microvolt = <3700000>;
+ regulator-max-microvolt = <3700000>;
+
+ regulator-always-on;
+ regulator-boot-on;
+ };
+};
+
+&apps_rsc {
+ pm8350-rpmh-regulators {
+ compatible = "qcom,pm8350-rpmh-regulators";
+ qcom,pmic-id = "b";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-s9-supply = <&vph_pwr>;
+ vdd-s10-supply = <&vph_pwr>;
+ vdd-s11-supply = <&vph_pwr>;
+ vdd-s12-supply = <&vph_pwr>;
+
+ vdd-l1-l4-supply = <&pm8350_s11>;
+ vdd-l2-l7-supply = <&vreg_bob>;
+ vdd-l3-l5-supply = <&vreg_bob>;
+ vdd-l6-l9-l10-supply = <&pm8350_s12>;
+
+ /*
+ * ARC regulators:
+ * s5 - gfx.lvl
+ * l8 - lcx.lvl
+ */
+
+ pm8350_s10: smps10 {
+ regulator-name = "pm8350_s10";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
+ pm8350_s11: smps11 {
+ regulator-name = "pm8350_s11";
+ regulator-min-microvolt = <848000>;
+ regulator-max-microvolt = <1104000>;
+ };
+
+ pm8350_s12: smps12 {
+ regulator-name = "pm8350_s12";
+ regulator-min-microvolt = <1224000>;
+ regulator-max-microvolt = <1400000>;
+ };
+
+ pm8350_l1: ldo1 {
+ regulator-name = "pm8350_l1";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <920000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l2: ldo2 {
+ regulator-name = "pm8350_l2";
+ regulator-min-microvolt = <3072000>;
+ regulator-max-microvolt = <3072000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l3: ldo3 {
+ regulator-name = "pm8350_l3";
+ regulator-min-microvolt = <904000>;
+ regulator-max-microvolt = <904000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l5: ldo5 {
+ regulator-name = "pm8350_l5";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l6: ldo6 {
+ regulator-name = "pm8350_l6";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l7: ldo7 {
+ regulator-name = "pm8350_l7";
+ regulator-min-microvolt = <2504000>;
+ regulator-max-microvolt = <2504000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350_l9: ldo9 {
+ regulator-name = "pm8350_l9";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pm8350c-rpmh-regulators {
+ compatible = "qcom,pm8350c-rpmh-regulators";
+ qcom,pmic-id = "c";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+ vdd-s7-supply = <&vph_pwr>;
+ vdd-s8-supply = <&vph_pwr>;
+ vdd-s9-supply = <&vph_pwr>;
+ vdd-s10-supply = <&vph_pwr>;
+
+ vdd-l1-l12-supply = <&vreg_bob>;
+ vdd-l2-l8-supply = <&vreg_bob>;
+ vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
+ vdd-l6-l9-l11-supply = <&vreg_bob>;
+ vdd-l10-supply = <&pm8350_s12>;
+
+ vdd-bob-supply = <&vph_pwr>;
+
+ /*
+ * ARC regulators:
+ * s2 - mxc.lvl
+ * s4 - mss.lvl
+ * s6 - cx.lvl
+ */
+
+ pm8350c_s1: smps1 {
+ regulator-name = "pm8350c_s1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2024000>;
+ };
+
+ pm8350c_s10: smps10 {
+ regulator-name = "pm8350c_s10";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
+ vreg_bob: bob {
+ regulator-name = "vreg_bob";
+ regulator-min-microvolt = <3400000>;
+ regulator-max-microvolt = <3960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
+ };
+
+ pm8350c_l1: ldo1 {
+ regulator-name = "pm8350c_l1";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l2: ldo2 {
+ regulator-name = "pm8350c_l2";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l3: ldo3 {
+ regulator-name = "pm8350c_l3";
+ regulator-min-microvolt = <3296000>;
+ regulator-max-microvolt = <3304000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l4: ldo4 {
+ regulator-name = "pm8350c_l4";
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l5: ldo5 {
+ regulator-name = "pm8350c_l5";
+ regulator-min-microvolt = <1704000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l6: ldo6 {
+ regulator-name = "pm8350c_l6";
+ regulator-min-microvolt = <2960000>;
+ /* Originally max = 3008000 but SDHCI expects 2960000 */
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l7: ldo7 {
+ regulator-name = "pm8350c_l7";
+ regulator-min-microvolt = <3008000>;
+ regulator-max-microvolt = <3008000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l8: ldo8 {
+ regulator-name = "pm8350c_l8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l9: ldo9 {
+ regulator-name = "pm8350c_l9";
+ regulator-min-microvolt = <2960000>;
+ /* Originally max = 3008000 but SDHCI expects 2960000 */
+ regulator-max-microvolt = <2960000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l10: ldo10 {
+ regulator-name = "pm8350c_l10";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l12: ldo12 {
+ regulator-name = "pm8350c_l12";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1968000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8350c_l13: ldo13 {
+ regulator-name = "pm8350c_l13";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+ };
+
+ pm8450-rpmh-regulators {
+ compatible = "qcom,pm8450-rpmh-regulators";
+ qcom,pmic-id = "h";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+ vdd-s4-supply = <&vph_pwr>;
+ vdd-s5-supply = <&vph_pwr>;
+ vdd-s6-supply = <&vph_pwr>;
+
+ vdd-l2-supply = <&vreg_bob>;
+ vdd-l3-supply = <&vreg_bob>;
+ vdd-l4-supply = <&vreg_bob>;
+
+ /*
+ * ARC regulators:
+ * S2 - ebi.lvl
+ * S4 - mmcx.lvl
+ * S6 - mx.lvl
+ * L1 - lmx.lvl
+ */
+
+ pm8450_s3: smps3 {
+ regulator-name = "pm8450_s3";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <600000>;
+ };
+
+ pm8450_l2: ldo2 {
+ regulator-name = "pm8450_l2";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ pm8450_l3: ldo3 {
+ regulator-name = "pm8450_l3";
+ regulator-min-microvolt = <912000>;
+ regulator-max-microvolt = <912000>;
+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+ };
+
+ };
+
+ pmr735a-rpmh-regulators {
+ compatible = "qcom,pmr735a-rpmh-regulators";
+ qcom,pmic-id = "e";
+
+ vdd-s1-supply = <&vph_pwr>;
+ vdd-s2-supply = <&vph_pwr>;
+ vdd-s3-supply = <&vph_pwr>;
+
+ vdd-l1-l2-supply = <&pmr735a_s2>;
+ vdd-l3-supply = <&pmr735a_s1>;
+ vdd-l4-supply = <&pm8350c_s1>;
+ vdd-l5-l6-supply = <&pm8350c_s1>;
+ vdd-l7-bob-supply = <&vreg_bob>;
+
+ pmr735a_s1: smps1 {
+ regulator-name = "pmr735a_s1";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1296000>;
+ };
+
+ pmr735a_s2: smps2 {
+ regulator-name = "pmr735a_s2";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <1040000>;
+ };
+
+ pmr735a_s3: smps3 {
+ regulator-name = "pmr735a_s3";
+ regulator-min-microvolt = <435000>;
+ regulator-max-microvolt = <2352000>;
+ };
+
+ pmr735a_l1: ldo1 {
+ regulator-name = "pmr735a_l1";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ };
+
+ pmr735a_l2: ldo2 {
+ regulator-name = "pmr735a_l2";
+ regulator-min-microvolt = <480000>;
+ regulator-max-microvolt = <912000>;
+ };
+
+ pmr735a_l3: ldo3 {
+ regulator-name = "pmr735a_l3";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pmr735a_l4: ldo4 {
+ regulator-name = "pmr735a_l4";
+ regulator-min-microvolt = <1776000>;
+ regulator-max-microvolt = <1776000>;
+ };
+
+ pmr735a_l5: ldo5 {
+ regulator-name = "pmr735a_l5";
+ regulator-min-microvolt = <880000>;
+ regulator-max-microvolt = <880000>;
+ };
+
+ pmr735a_l6: ldo6 {
+ regulator-name = "pmr735a_l6";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ };
+
+ pmr735a_l7: ldo7 {
+ regulator-name = "pmr735a_l7";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ };
+ };
+};
+
+&gpi_dma0 {
+ status = "okay";
+};
+
+&gpi_dma1 {
+ status = "okay";
+};
+
+&gpi_dma2 {
+ status = "okay";
+};
+
+/* I2C4 is used, it hosts a Samsung touchscreen, but GPI DMA is broken.. */
+
+&i2c5 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* Dialog SLG51000 CMIC @ 75 */
+};
+
+&i2c9 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* NXP SN1X0 NFC @ 28 */
+};
+
+&i2c13 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* Richwave RTC6226 FM Radio Receiver @ 64 */
+};
+
+&i2c14 {
+ clock-frequency = <1000000>;
+ status = "okay";
+
+ cs35l41_l: cs35l41@40 {
+ compatible = "cirrus,cs35l41";
+ reg = <0x40>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <182 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
+ cirrus,boost-peak-milliamp = <4000>;
+ cirrus,boost-ind-nanohenry = <1000>;
+ cirrus,boost-cap-microfarad = <15>;
+ cirrus,gpio2-src-select = <2>;
+ cirrus,gpio2-output-enable;
+ cirrus,asp-sdout-hiz = <3>;
+ #sound-dai-cells = <1>;
+ };
+
+ cs35l41_r: cs35l41@41 {
+ compatible = "cirrus,cs35l41";
+ reg = <0x41>;
+ interrupt-parent = <&tlmm>;
+ interrupts = <182 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
+ cirrus,boost-peak-milliamp = <4000>;
+ cirrus,boost-ind-nanohenry = <1000>;
+ cirrus,boost-cap-microfarad = <15>;
+ cirrus,gpio2-src-select = <2>;
+ cirrus,gpio2-output-enable;
+ cirrus,asp-sdout-hiz = <3>;
+ #sound-dai-cells = <1>;
+ };
+};
+
+&i2c15 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ /* AMS TCS3490 RGB+IR color sensor @ 72 */
+};
+
+&i2c19 {
+ clock-frequency = <1000000>;
+ status = "okay";
+
+ /* Cirrus Logic CS40L25A boosted haptics driver @ 40 */
+};
+
+&pcie0 {
+ max-link-speed = <2>;
+ status = "okay";
+};
+
+&pcie0_phy {
+ vdda-phy-supply = <&pm8350_l5>;
+ vdda-pll-supply = <&pm8350_l6>;
+ status = "okay";
+};
+
+&remoteproc_adsp {
+ firmware-name = "qcom/adsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_cdsp {
+ firmware-name = "qcom/cdsp.mbn";
+ status = "okay";
+};
+
+&remoteproc_slpi {
+ firmware-name = "qcom/slpi.mbn";
+ status = "okay";
+};
+
+&qupv3_id_0 {
+ status = "okay";
+};
+
+&qupv3_id_1 {
+ status = "okay";
+};
+
+&qupv3_id_2 {
+ status = "okay";
+};
+
+&sdhc_2 {
+ cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
+ pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
+ vmmc-supply = <&pm8350c_l9>;
+ vqmmc-supply = <&pm8350c_l6>;
+ /* Forbid SDR104/SDR50 - broken hw! */
+ sdhci-caps-mask = <0x3 0x0>;
+ no-sdio;
+ no-mmc;
+ status = "okay";
+};
+
+&spi10 {
+ status = "okay";
+
+ /* NXP SN1X0 NFC Secure Element @ 0 */
+};
+
+&tlmm {
+ gpio-reserved-ranges = <28 4>;
+
+ sdc2_default_state: sdc2-default {
+ clk {
+ pins = "sdc2_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+
+ data {
+ pins = "sdc2_data";
+ drive-strength = <16>;
+ bias-pull-up;
+ };
+ };
+
+ ts_int_default: ts-int-default {
+ pins = "gpio23";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ input-enable;
+ };
+
+ sdc2_card_det_n: sd-card-det-n {
+ pins = "gpio92";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+};
+
+&uart7 {
+ status = "okay";
+};
+
+&usb_1 {
+ status = "okay";
+};
+
+&usb_1_dwc3 {
+ dr_mode = "peripheral";
+};
+
+&usb_1_hsphy {
+ vdda-pll-supply = <&pm8350_l5>;
+ vdda18-supply = <&pm8350c_l1>;
+ vdda33-supply = <&pm8350_l2>;
+ status = "okay";
+};
+
+&usb_1_qmpphy {
+ vdda-phy-supply = <&pm8350_l6>;
+ vdda-pll-supply = <&pm8350_l1>;
+ status = "okay";
+};
--
2.37.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 4/4] arm64: dts: qcom: Add device tree for Sony Xperia 1 IV
2022-07-13 20:10 ` [PATCH 4/4] arm64: dts: qcom: Add device tree for Sony Xperia 1 IV Konrad Dybcio
@ 2022-07-14 11:16 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-07-14 11:16 UTC (permalink / raw)
To: Konrad Dybcio, ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Kees Cook, Anton Vorontsov, Colin Cross,
Tony Luck, linux-arm-msm, devicetree, linux-kernel
On 13/07/2022 22:10, Konrad Dybcio wrote:
> Add support for Sony Xperia 1 IV, a.k.a PDX223. This device is a part
> of the SoMC SM8450 Nagara platform and currently it is the only
> device based on that board, so no -common DTSI is created until (if?)
> other Nagara devices appear.
>
> This commit brings support for:
Thank you for your patch. There is something to discuss/improve.
> + pm8450_s3: smps3 {
> + regulator-name = "pm8450_s3";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <600000>;
> + };
> +
> + pm8450_l2: ldo2 {
> + regulator-name = "pm8450_l2";
> + regulator-min-microvolt = <880000>;
> + regulator-max-microvolt = <912000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
> + pm8450_l3: ldo3 {
> + regulator-name = "pm8450_l3";
> + regulator-min-microvolt = <912000>;
> + regulator-max-microvolt = <912000>;
> + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
> + };
> +
Remove blank line.
> + };
> +
> + pmr735a-rpmh-regulators {
> + compatible = "qcom,pmr735a-rpmh-regulators";
> + qcom,pmic-id = "e";
> +
> + vdd-s1-supply = <&vph_pwr>;
> + vdd-s2-supply = <&vph_pwr>;
> + vdd-s3-supply = <&vph_pwr>;
> +
> + vdd-l1-l2-supply = <&pmr735a_s2>;
> + vdd-l3-supply = <&pmr735a_s1>;
> + vdd-l4-supply = <&pm8350c_s1>;
> + vdd-l5-l6-supply = <&pm8350c_s1>;
> + vdd-l7-bob-supply = <&vreg_bob>;
> +
> + pmr735a_s1: smps1 {
> + regulator-name = "pmr735a_s1";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1296000>;
> + };
> +
> + pmr735a_s2: smps2 {
> + regulator-name = "pmr735a_s2";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <1040000>;
> + };
> +
> + pmr735a_s3: smps3 {
> + regulator-name = "pmr735a_s3";
> + regulator-min-microvolt = <435000>;
> + regulator-max-microvolt = <2352000>;
> + };
> +
> + pmr735a_l1: ldo1 {
> + regulator-name = "pmr735a_l1";
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <800000>;
> + };
> +
> + pmr735a_l2: ldo2 {
> + regulator-name = "pmr735a_l2";
> + regulator-min-microvolt = <480000>;
> + regulator-max-microvolt = <912000>;
> + };
> +
> + pmr735a_l3: ldo3 {
> + regulator-name = "pmr735a_l3";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + pmr735a_l4: ldo4 {
> + regulator-name = "pmr735a_l4";
> + regulator-min-microvolt = <1776000>;
> + regulator-max-microvolt = <1776000>;
> + };
> +
> + pmr735a_l5: ldo5 {
> + regulator-name = "pmr735a_l5";
> + regulator-min-microvolt = <880000>;
> + regulator-max-microvolt = <880000>;
> + };
> +
> + pmr735a_l6: ldo6 {
> + regulator-name = "pmr735a_l6";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1200000>;
> + };
> +
> + pmr735a_l7: ldo7 {
> + regulator-name = "pmr735a_l7";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + };
> + };
> +};
> +
> +&gpi_dma0 {
> + status = "okay";
> +};
> +
> +&gpi_dma1 {
> + status = "okay";
> +};
> +
> +&gpi_dma2 {
> + status = "okay";
> +};
> +
> +/* I2C4 is used, it hosts a Samsung touchscreen, but GPI DMA is broken.. */
> +
> +&i2c5 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + /* Dialog SLG51000 CMIC @ 75 */
> +};
> +
> +&i2c9 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + /* NXP SN1X0 NFC @ 28 */
> +};
> +
> +&i2c13 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + /* Richwave RTC6226 FM Radio Receiver @ 64 */
> +};
> +
> +&i2c14 {
> + clock-frequency = <1000000>;
> + status = "okay";
> +
> + cs35l41_l: cs35l41@40 {
Generic node name is needed.
> + compatible = "cirrus,cs35l41";
> + reg = <0x40>;
> + interrupt-parent = <&tlmm>;
> + interrupts = <182 IRQ_TYPE_LEVEL_LOW>;
> + reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
> + cirrus,boost-peak-milliamp = <4000>;
> + cirrus,boost-ind-nanohenry = <1000>;
> + cirrus,boost-cap-microfarad = <15>;
> + cirrus,gpio2-src-select = <2>;
> + cirrus,gpio2-output-enable;
> + cirrus,asp-sdout-hiz = <3>;
> + #sound-dai-cells = <1>;
> + };
> +
> + cs35l41_r: cs35l41@41 {
Ditto.
> + compatible = "cirrus,cs35l41";
> + reg = <0x41>;
> + interrupt-parent = <&tlmm>;
> + interrupts = <182 IRQ_TYPE_LEVEL_LOW>;
> + reset-gpios = <&tlmm 183 GPIO_ACTIVE_HIGH>;
> + cirrus,boost-peak-milliamp = <4000>;
> + cirrus,boost-ind-nanohenry = <1000>;
> + cirrus,boost-cap-microfarad = <15>;
> + cirrus,gpio2-src-select = <2>;
> + cirrus,gpio2-output-enable;
> + cirrus,asp-sdout-hiz = <3>;
> + #sound-dai-cells = <1>;
> + };
> +};
> +
> +&i2c15 {
> + clock-frequency = <400000>;
> + status = "okay";
> +
> + /* AMS TCS3490 RGB+IR color sensor @ 72 */
> +};
> +
> +&i2c19 {
> + clock-frequency = <1000000>;
> + status = "okay";
> +
> + /* Cirrus Logic CS40L25A boosted haptics driver @ 40 */
> +};
> +
> +&pcie0 {
> + max-link-speed = <2>;
> + status = "okay";
> +};
> +
> +&pcie0_phy {
> + vdda-phy-supply = <&pm8350_l5>;
> + vdda-pll-supply = <&pm8350_l6>;
> + status = "okay";
> +};
> +
> +&remoteproc_adsp {
> + firmware-name = "qcom/adsp.mbn";
> + status = "okay";
> +};
> +
> +&remoteproc_cdsp {
> + firmware-name = "qcom/cdsp.mbn";
> + status = "okay";
> +};
> +
> +&remoteproc_slpi {
> + firmware-name = "qcom/slpi.mbn";
> + status = "okay";
> +};
> +
> +&qupv3_id_0 {
> + status = "okay";
> +};
> +
> +&qupv3_id_1 {
> + status = "okay";
> +};
> +
> +&qupv3_id_2 {
> + status = "okay";
> +};
> +
> +&sdhc_2 {
> + cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
> + pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
> + vmmc-supply = <&pm8350c_l9>;
> + vqmmc-supply = <&pm8350c_l6>;
> + /* Forbid SDR104/SDR50 - broken hw! */
> + sdhci-caps-mask = <0x3 0x0>;
Wrong indentation.
> + no-sdio;
> + no-mmc;
> + status = "okay";
> +};
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223)
2022-07-13 20:10 [PATCH 1/4] dt-bindings: arm: qcom: Document Sony Xperia 1 IV (PDX223) Konrad Dybcio
` (2 preceding siblings ...)
2022-07-13 20:10 ` [PATCH 4/4] arm64: dts: qcom: Add device tree for Sony Xperia 1 IV Konrad Dybcio
@ 2022-07-14 11:12 ` Krzysztof Kozlowski
3 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-07-14 11:12 UTC (permalink / raw)
To: Konrad Dybcio, ~postmarketos/upstreaming
Cc: martin.botka, angelogioacchino.delregno, marijn.suijten,
jamipkettunen, Andy Gross, Bjorn Andersson, Rob Herring,
Krzysztof Kozlowski, Stephen Boyd, linux-arm-msm, devicetree,
linux-kernel
On 13/07/2022 22:10, Konrad Dybcio wrote:
> Document the compatible for the PDX223 device.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread