From: Daniel Lezcano <daniel.lezcano@linaro.org>
To: John Madieu <john.madieu.xa@bp.renesas.com>
Cc: "conor+dt@kernel.org" <conor+dt@kernel.org>,
"geert+renesas@glider.be" <geert+renesas@glider.be>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"rafael@kernel.org" <rafael@kernel.org>,
Biju Das <biju.das.jz@bp.renesas.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"john.madieu@gmail.com" <john.madieu@gmail.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"lukasz.luba@arm.com" <lukasz.luba@arm.com>,
"magnus.damm" <magnus.damm@gmail.com>,
"robh@kernel.org" <robh@kernel.org>,
"rui.zhang@intel.com" <rui.zhang@intel.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"niklas.soderlund+renesas@ragnatech.se"
<niklas.soderlund+renesas@ragnatech.se>
Subject: Re: [PATCH v6 3/5] thermal: renesas: rzg3e: Add thermal driver for the Renesas RZ/G3E SoC
Date: Mon, 4 Aug 2025 18:08:03 +0200 [thread overview]
Message-ID: <64622ffd-05d1-43c3-85d0-cf98f3012477@linaro.org> (raw)
In-Reply-To: <OSCPR01MB14647DE009925C982AE6BB5D2FF27A@OSCPR01MB14647.jpnprd01.prod.outlook.com>
On 31/07/2025 19:19, John Madieu wrote:
> Hi Daniel,
>
> Thanks for your review.
>
>> -----Original Message-----
>> From: Daniel Lezcano <daniel.lezcano@linaro.org>
>> Sent: Wednesday, July 16, 2025 11:11 PM
>> To: John Madieu <john.madieu.xa@bp.renesas.com>
>> Subject: Re: [PATCH v6 3/5] thermal: renesas: rzg3e: Add thermal driver
>> for the Renesas RZ/G3E SoC
>>
>> On Thu, May 22, 2025 at 08:22:46PM +0200, John Madieu wrote:
>>> The RZ/G3E SoC integrates a Temperature Sensor Unit (TSU) block
>>> designed to monitor the chip's junction temperature. This sensor is
>>> connected to channel 1 of the APB port clock/reset and provides
>> temperature measurements.
>>>
>>> It also requires calibration values stored in the system controller
>>> registers for accurate temperature measurement. Add a driver for the
>> Renesas RZ/G3E TSU.
>>>
>>> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
>>> ---
[ ... ]
>>> +static int rzg3e_thermal_get_temp(struct thermal_zone_device *zone,
>>> +int *temp) {
>>> + struct rzg3e_thermal_priv *priv = thermal_zone_device_priv(zone);
>>> + u32 val;
>>> + int ret;
>>> +
>>> + if (priv->mode == THERMAL_DEVICE_DISABLED)
>>> + return -EBUSY;
[ ... ]
>>> + reinit_completion(&priv->conv_complete);
>>> +
>>> + /* Enable ADC interrupt */
>>> + writel(TSU_SIER_ADIE, priv->base + TSU_SIER);
>>
>> Why enable irq here ?
>>
>
> I did it this way because, in 'set_trips' callback, the
> driver does trigger conversion to check whether the current
> temperature is part of the window or not, and triggers the
> comparison interrupt accordingly. Because of that, I did not
> want the conversion-complete interrupt to also be triggered.
>
> That's the reason why I enable conversion-complete interrupt
> in 'get_temp', to make sure its interrupt is being triggered
> only when the thermal core calls it.
>
> Should I do it another way ?
I don't ATM, the approach is very unusual so I'm still trying to figure
out what is this completion approach and readl_poll_timeout_atomic. At
the first glance I would say it is wrong.
>>> + /* Verify no ongoing conversion */
>>> + ret = readl_poll_timeout_atomic(priv->base + TSU_SSR, val,
>>> + !(val & TSU_SSR_CONV_RUNNING),
>>> + TSU_POLL_DELAY_US, TSU_TIMEOUT_US);
>>> + if (ret) {
>>> + dev_err(priv->dev, "ADC conversion timed out\n");
>>> + return ret;
>>> + }
>>> +
>>> + /* Start conversion */
>>> + writel(TSU_STRGR_ADST, priv->base + TSU_STRGR);
>>> +
>>> + if (!wait_for_completion_timeout(&priv->conv_complete,
>>> + msecs_to_jiffies(100))) {
>>> + dev_err(priv->dev, "ADC conversion completion timeout\n");
>>> + return -ETIMEDOUT;
>>> + }
>>
>> Can you explain what is happening here ?
>>
>
> I might not get what you are asking, but since I compute the
> temperature in the hard IRQ handler, I just wait for it to complete
> and notify the completion so I can grab the processed value to notify
> the thermal core.
>
> Please let me know if this does not answer your question.
Can you describe how the sensor works ? And perhaps if you have a
pointer to some documentation ?
[ ... ]
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next prev parent reply other threads:[~2025-08-04 16:08 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 18:22 [PATCH v6 0/5] thermal: renesas: Add support for RZ/G3E John Madieu
2025-05-22 18:22 ` [PATCH v6 1/5] soc: renesas: rz-sysc: Add syscon/regmap support John Madieu
2025-08-04 9:19 ` Geert Uytterhoeven
2025-08-05 12:38 ` John Madieu
2025-05-22 18:22 ` [PATCH v6 2/5] dt-bindings: thermal: r9a09g047-tsu: Document the TSU unit John Madieu
2025-05-22 18:22 ` [PATCH v6 3/5] thermal: renesas: rzg3e: Add thermal driver for the Renesas RZ/G3E SoC John Madieu
2025-06-06 6:17 ` Biju Das
2025-06-11 10:54 ` John Madieu
2025-07-16 21:11 ` Daniel Lezcano
2025-07-31 17:19 ` John Madieu
2025-08-04 16:08 ` Daniel Lezcano [this message]
2025-08-05 7:49 ` John Madieu
2025-08-05 10:05 ` Daniel Lezcano
2025-08-13 17:44 ` John Madieu
2025-08-04 9:28 ` Geert Uytterhoeven
2025-08-05 8:27 ` John Madieu
2025-08-05 8:47 ` Geert Uytterhoeven
2025-08-05 9:22 ` John Madieu
2025-08-05 9:35 ` Geert Uytterhoeven
2025-08-05 9:52 ` John Madieu
2025-05-22 18:22 ` [PATCH v6 4/5] arm64: dts: renesas: r9a09g047: Add TSU node John Madieu
2025-05-22 18:22 ` [PATCH v6 5/5] arm64: defconfig: Enable the Renesas RZ/G3E thermal driver John Madieu
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