* [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table
@ 2023-07-12 21:17 Frank Li
2023-07-12 21:17 ` [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map Frank Li
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Frank Li @ 2023-07-12 21:17 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Li Yang, Pierre Gondois, Chester Lin, Zhou Peng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
Add A53 and A72 opp_table.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 72 +++++++++++++++++++++++
1 file changed, 72 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 9fff867709f0..24508b84804b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -62,6 +62,7 @@ A53_0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
+ clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@@ -70,12 +71,14 @@ A53_0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
+ clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@@ -84,12 +87,14 @@ A53_1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
+ clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@@ -98,12 +103,14 @@ A53_2: cpu@2 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A53_3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
+ clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
i-cache-size = <0x8000>;
i-cache-line-size = <64>;
@@ -112,12 +119,14 @@ A53_3: cpu@3 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
+ operating-points-v2 = <&a53_opp_table>;
};
A72_0: cpu@100 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x0 0x100>;
+ clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
i-cache-size = <0xC000>;
i-cache-line-size = <64>;
@@ -126,14 +135,17 @@ A72_0: cpu@100 {
d-cache-line-size = <64>;
d-cache-sets = <256>;
next-level-cache = <&A72_L2>;
+ operating-points-v2 = <&a72_opp_table>;
};
A72_1: cpu@101 {
device_type = "cpu";
compatible = "arm,cortex-a72";
reg = <0x0 0x101>;
+ clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>;
enable-method = "psci";
next-level-cache = <&A72_L2>;
+ operating-points-v2 = <&a72_opp_table>;
};
A53_L2: l2-cache0 {
@@ -155,6 +167,66 @@ A72_L2: l2-cache1 {
};
};
+ a53_opp_table: a53-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-896000000 {
+ opp-hz = /bits/ 64 <896000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <150000>;
+ opp-suspend;
+ };
+ };
+
+ a72_opp_table: a72-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1000000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <150000>;
+ };
+
+ opp-1596000000 {
+ opp-hz = /bits/ 64 <1596000000>;
+ opp-microvolt = <1100000>;
+ clock-latency-ns = <150000>;
+ opp-suspend;
+ };
+ };
+
gic: interrupt-controller@51a00000 {
compatible = "arm,gic-v3";
reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map
2023-07-12 21:17 [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Frank Li
@ 2023-07-12 21:17 ` Frank Li
2023-07-13 6:42 ` Krzysztof Kozlowski
2023-07-13 7:22 ` Peng Fan
2023-07-12 21:17 ` [PATCH 3/3] arm64: dts: imx8qm-mek: delete A72 thermal zone Frank Li
2023-07-13 7:20 ` [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Peng Fan
2 siblings, 2 replies; 7+ messages in thread
From: Frank Li @ 2023-07-12 21:17 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Marcel Ziswiler, Pierre Gondois, Li Yang,
Zhou Peng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
Add thermal zone and cooling map for cpufreq.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qm.dtsi | 135 ++++++++++++++++++++++
1 file changed, 135 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
index 24508b84804b..30520186de83 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/pads-imx8qm.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -72,6 +73,7 @@ A53_0: cpu@0 {
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
+ #cooling-cells = <2>;
};
A53_1: cpu@1 {
@@ -88,6 +90,7 @@ A53_1: cpu@1 {
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
+ #cooling-cells = <2>;
};
A53_2: cpu@2 {
@@ -104,6 +107,7 @@ A53_2: cpu@2 {
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
+ #cooling-cells = <2>;
};
A53_3: cpu@3 {
@@ -120,6 +124,7 @@ A53_3: cpu@3 {
d-cache-sets = <128>;
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
+ #cooling-cells = <2>;
};
A72_0: cpu@100 {
@@ -136,6 +141,7 @@ A72_0: cpu@100 {
d-cache-sets = <256>;
next-level-cache = <&A72_L2>;
operating-points-v2 = <&a72_opp_table>;
+ #cooling-cells = <2>;
};
A72_1: cpu@101 {
@@ -146,6 +152,7 @@ A72_1: cpu@101 {
enable-method = "psci";
next-level-cache = <&A72_L2>;
operating-points-v2 = <&a72_opp_table>;
+ #cooling-cells = <2>;
};
A53_L2: l2-cache0 {
@@ -284,6 +291,134 @@ iomuxc: pinctrl {
rtc: rtc {
compatible = "fsl,imx8qxp-sc-rtc";
};
+
+ tsens: thermal-sensor {
+ compatible = "fsl,imx-sc-thermal";
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
+ thermal-zones {
+
+ cpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_A53>;
+
+ trips {
+ cpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert0>;
+ cooling-device =
+ <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ cpu-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_A72>;
+
+ trips {
+ cpu_alert1: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit1: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_alert1>;
+ cooling-device =
+ <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_GPU_0_PID0>;
+
+ trips {
+ gpu_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpu_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ gpu-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_GPU_1_PID0>;
+
+ trips {
+ gpu_alert1: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ gpu_crit1: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ drc-thermal0 {
+ polling-delay-passive = <250>;
+ polling-delay = <2000>;
+ thermal-sensors = <&tsens IMX_SC_R_DRC_0>;
+
+ trips {
+ drc_alert0: trip0 {
+ temperature = <107000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ drc_crit0: trip1 {
+ temperature = <127000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
};
/* sorted in register address */
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map
2023-07-12 21:17 ` [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map Frank Li
@ 2023-07-13 6:42 ` Krzysztof Kozlowski
2023-07-13 7:22 ` Peng Fan
1 sibling, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2023-07-13 6:42 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Marcel Ziswiler, Pierre Gondois, Li Yang,
Zhou Peng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
On 12/07/2023 23:17, Frank Li wrote:
> Add thermal zone and cooling map for cpufreq.
>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> arch/arm64/boot/dts/freescale/imx8qm.dtsi | 135 ++++++++++++++++++++++
> 1 file changed, 135 insertions(+)
...
>
> A53_L2: l2-cache0 {
> @@ -284,6 +291,134 @@ iomuxc: pinctrl {
> rtc: rtc {
> compatible = "fsl,imx8qxp-sc-rtc";
> };
> +
> + tsens: thermal-sensor {
> + compatible = "fsl,imx-sc-thermal";
> + #thermal-sensor-cells = <1>;
> + };
> + };
> +
> + thermal-zones {
> +
Drop stray blank lines.
> + cpu-thermal0 {
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map
2023-07-12 21:17 ` [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map Frank Li
2023-07-13 6:42 ` Krzysztof Kozlowski
@ 2023-07-13 7:22 ` Peng Fan
1 sibling, 0 replies; 7+ messages in thread
From: Peng Fan @ 2023-07-13 7:22 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Marcel Ziswiler, Pierre Gondois, Li Yang,
Zhou Peng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
On 7/13/2023 5:17 AM, Frank Li wrote:
> Add thermal zone and cooling map for cpufreq.
>
> Signed-off-by: Frank Li<Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/3] arm64: dts: imx8qm-mek: delete A72 thermal zone
2023-07-12 21:17 [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Frank Li
2023-07-12 21:17 ` [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map Frank Li
@ 2023-07-12 21:17 ` Frank Li
2023-07-13 7:23 ` Peng Fan
2023-07-13 7:20 ` [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Peng Fan
2 siblings, 1 reply; 7+ messages in thread
From: Frank Li @ 2023-07-12 21:17 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Shawn Guo,
Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Shenwei Wang,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
The A72 nodes have been deleted in this DTB. Removes the corresponding
thermal zone to ensure a successful build.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 607cd6b4e972..b0116b219c7b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -22,6 +22,10 @@ cpus {
/delete-node/ cpu@101;
};
+ thermal-zones {
+ /delete-node/ cpu-thermal1;
+ };
+
memory@80000000 {
device_type = "memory";
reg = <0x00000000 0x80000000 0 0x40000000>;
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 3/3] arm64: dts: imx8qm-mek: delete A72 thermal zone
2023-07-12 21:17 ` [PATCH 3/3] arm64: dts: imx8qm-mek: delete A72 thermal zone Frank Li
@ 2023-07-13 7:23 ` Peng Fan
0 siblings, 0 replies; 7+ messages in thread
From: Peng Fan @ 2023-07-13 7:23 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Shenwei Wang,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
On 7/13/2023 5:17 AM, Frank Li wrote:
> The A72 nodes have been deleted in this DTB. Removes the corresponding
> thermal zone to ensure a successful build.
>
> Signed-off-by: Frank Li<Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table
2023-07-12 21:17 [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Frank Li
2023-07-12 21:17 ` [PATCH 2/3] arm64: dts: imx8qm: add thermal zone and cooling map Frank Li
2023-07-12 21:17 ` [PATCH 3/3] arm64: dts: imx8qm-mek: delete A72 thermal zone Frank Li
@ 2023-07-13 7:20 ` Peng Fan
2 siblings, 0 replies; 7+ messages in thread
From: Peng Fan @ 2023-07-13 7:20 UTC (permalink / raw)
To: Frank Li, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Shawn Guo, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Li Yang, Pierre Gondois, Chester Lin, Zhou Peng,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: imx
On 7/13/2023 5:17 AM, Frank Li wrote:
> Add A53 and A72 opp_table.
>
> Signed-off-by: Frank Li<Frank.Li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2023-07-13 7:23 UTC | newest]
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2023-07-13 6:42 ` Krzysztof Kozlowski
2023-07-13 7:22 ` Peng Fan
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