Re: [PATCH 01/35] dt-bindings: qcom,pdc: Tighten reg to single APSS DRV region

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 4/14/26 6:23 PM, Dmitry Baryshkov wrote:
> On Mon, Apr 13, 2026 at 10:23:59AM +0200, Konrad Dybcio wrote:
>> On 4/11/26 4:32 PM, Dmitry Baryshkov wrote:
>>> On Sat, Apr 11, 2026 at 12:10:38AM +0530, Mukesh Ojha wrote:
>>>> The PDC has multiple DRV regions, each sized 0x10000, where each region
>>>> serves a specific client in the system. Linux only needs access to the
>>>
>>> Nit: there are other OS than Linux. Would you rather point out that
>>> other DRV regions are to be used by ... what?
>>
>> TZ, HYP, HLOS, CPUCP..
> 
> => commit message
> 
>>
>> I'm wondering if we can make use of the HYP one on e.g. Glymur, to
>> parallelize accesses (and whether that would bring any practical
>> benefit).
>>
>> In the RPMH architecture, each "client" has their own (GPU, AOP, DISP,
>> etc.). Then, each one of those clients may have an associates RSC
>> (Resource State Coordinator) and/or anyOf BCM ("interconnect"), VRM
>> ("regulator"), ARC ("RPMHPD") voting interfaces
> 
> At least the RSC should be visible to the OS. We don't use it (now), but
> we probably will at some point (at least the DISP_RSC) if I understand
> it correctly.

The display RSC is a separate instance, living at a far different
register base. Same with the PCIe RSC etc.

Konrad