From mboxrd@z Thu Jan 1 00:00:00 1970 From: Arnd Bergmann Subject: Re: [PATCH v7 5/6] Documentation: dt-bindings: pci: altera pcie device tree binding Date: Fri, 02 Oct 2015 23:56:37 +0200 Message-ID: <6497772.rqSurELzER@wuerfel> References: <1442801587-3812-1-git-send-email-lftan@altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: Sender: linux-doc-owner@vger.kernel.org To: Ley Foon Tan Cc: Rob Herring , Bjorn Helgaas , Russell King , Marc Zyngier , Dinh Nguyen , "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-doc@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Lorenzo Pieralisi List-Id: devicetree@vger.kernel.org On Friday 02 October 2015 15:53:44 Ley Foon Tan wrote: > > Strictly speaking, if you have undocumented bindings downstream that > > is your problem and we don't have to accept them as-is upstream. I'm > > not going to worry about that here. > > > >>> txs contains the config space? > >> It is not the config space, but a memory slave port. > > > > Then where is the config space? It should not be part of "ranges" is > > all I care about. > The config space is not part of "ranges". Our IP uses TLP packet to > access config space. > It took me a bit to figure out what you mean here. To save others from reading the source, here is what I found: * The config space is accessed indirectly through registers from the "cra" register range, which is the right approach according to the point that Rob made. * hardware-wise this basically looks like bit-banged PCIe, which is both awesome and scary ;-) Arnd