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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Sanghoon Bae <sh86.bae@samsung.com>,
	robh@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,
	alim.akhtar@samsung.com, kishon@kernel.org,
	m.szyprowski@samsung.com, jh80.chung@samsung.com,
	shradha.t@samsung.com
Cc: krzk+dt@kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
	linux-phy@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC
Date: Tue, 7 Oct 2025 15:29:54 +0900	[thread overview]
Message-ID: <649f8e90-d99b-401a-bb0f-ef0cf9c4fe7f@kernel.org> (raw)
In-Reply-To: <20250926073921.1000866-3-sh86.bae@samsung.com>

On 26/09/2025 16:39, Sanghoon Bae wrote:
> Since the Exynosautov920 SoC uses the Samsung PCIe PHY, add support
> for it in the Exynosautov920 PCIe PHY bindings.
> 
> The Exynosautov920 SoC includes two PHY instances: one for a 4-lane PHY
> and another for a 2-lane PHY. Each PHY can be used by separate
> controllers through the bifurcation option. Therefore, from 2 up to 4
> PCIe controllers can be supported and connected with this PHY driver.


Describe hardware, not driver.

> 
> PCIe lane number is used to distinguish each PHY instance.
> This is required since two PHY instances on ExynosAutov920 is not
> identical.
> On PHY driver code, need to check each instance and different settings.


Describe hardware, not driver.

> 
> Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com>
> ---
>  .../bindings/phy/samsung,exynos-pcie-phy.yaml      | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> index 6295472696db..1e8b88d2cd56 100644
> --- a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml
> @@ -19,6 +19,7 @@ properties:
>        - samsung,exynos5433-pcie-phy
>        - tesla,fsd-pcie-phy0
>        - tesla,fsd-pcie-phy1
> +      - samsung,exynosautov920-pcie-phy

Messed order.

>  
>    reg:
>      minItems: 1
> @@ -34,6 +35,10 @@ properties:
>      description: phandle for FSYS sysreg interface, used to control
>                   sysreg registers bits for PCIe PHY
>  
> +  num-lanes:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    enum: [2, 4]
> +
>  allOf:
>    - if:
>        properties:
> @@ -42,6 +47,7 @@ allOf:
>              enum:
>                - tesla,fsd-pcie-phy0
>                - tesla,fsd-pcie-phy1
> +              - samsung,exynosautov920-pcie-phy

Messed order.

Best regards,
Krzysztof

  reply	other threads:[~2025-10-07  6:30 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20250926073954epcas2p4b8bb4206e526b7d7860ed4378ed75f78@epcas2p4.samsung.com>
2025-09-26  7:39 ` [PATCH 0/4] Add support for ExynosAutov920 PCIe PHY Sanghoon Bae
     [not found]   ` <CGME20250926074011epcas2p438f7edb31c720c0950e9df986983f5a5@epcas2p4.samsung.com>
2025-09-26  7:39     ` [PATCH 1/4] dt-bindings: soc: samsung: exynos-sysreg: add hsi0 for ExynosAutov920 Sanghoon Bae
2025-10-07  6:28       ` Krzysztof Kozlowski
2025-11-14  5:36         ` 배상훈/Sanghoon Bae
     [not found]   ` <CGME20250926074017epcas2p18fb2fc616b92dc04ad9e018151c2ba29@epcas2p1.samsung.com>
2025-09-26  7:39     ` [PATCH 2/4] dt-bindings: phy: Add PCIe PHY support for ExynosAutov920 SoC Sanghoon Bae
2025-10-07  6:29       ` Krzysztof Kozlowski [this message]
2025-11-14  6:05         ` Sanghoon Bae
     [not found]   ` <CGME20250926074021epcas2p36a8dc02c84c9ca11e2318a1a8931d68a@epcas2p3.samsung.com>
2025-09-26  7:39     ` [PATCH 3/4] arm64: dts: ExynosAutov920: add PCIe PHY DT nodes Sanghoon Bae
2025-10-07  6:32       ` Krzysztof Kozlowski
2025-11-14  6:57         ` SanghoonBae
     [not found]   ` <CGME20250926074022epcas2p3aa1179b587beac076ef5942004c7d099@epcas2p3.samsung.com>
2025-09-26  7:39     ` [PATCH 4/4] phy: exynos: Add PCIe PHY support for ExynosAutov920 SoC Sanghoon Bae
     [not found]   ` <CGME20250926074033epcas2p371d57850f46c9ecb307f3ea8c6d4a57f@epcas2p3.samsung.com>
2025-09-26  7:39     ` [PATCH 0/4] Add support for ExynosAutov920 PCIe PHY Sanghoon Bae

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