From: Wei Xu <xuwei5@hisilicon.com>
To: David Yang <mmyangfl@gmail.com>, <linux-arm-kernel@lists.infradead.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: dts: hi3798cv200: Fix clocks order of sd0
Date: Fri, 4 Aug 2023 09:56:49 +0800 [thread overview]
Message-ID: <64CC5AE1.4000108@hisilicon.com> (raw)
In-Reply-To: <20230514122533.382910-1-mmyangfl@gmail.com>
Hi David，
On 2023/5/14 20:25, David Yang wrote:
> "ciu" and "biu" were incorrectly swapped. Fix their order.
>
> Signed-off-by: David Yang <mmyangfl@gmail.com>
> ---
> arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
> index a83b9d4f172e..ed1b5a7a6067 100644
> --- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
> +++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
> @@ -302,8 +302,8 @@ sd0: mmc@9820000 {
> compatible = "snps,dw-mshc";
> reg = <0x9820000 0x10000>;
> interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&crg HISTB_SDIO0_CIU_CLK>,
> - <&crg HISTB_SDIO0_BIU_CLK>;
> + clocks = <&crg HISTB_SDIO0_BIU_CLK>,
> + <&crg HISTB_SDIO0_CIU_CLK>;
> clock-names = "biu", "ciu";
> resets = <&crg 0x9c 4>;
> reset-names = "reset";
>
Applied to the HiSilicon arm64 dt tree.
Thanks!
Best Regards,
Wei
prev parent reply other threads:[~2023-08-04 1:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-14 12:25 [PATCH] arm64: dts: hi3798cv200: Fix clocks order of sd0 David Yang
2023-08-04 1:56 ` Wei Xu [this message]
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