[PATCH 0/3] Add support for the ASUS ROG Phone 3 (SM8250)

[PATCH 0/3] Add support for the ASUS ROG Phone 3 (SM8250)

[Alexander Koskovich]

Add the bindings & devicetree for the ASUS ROG Phone 3, this is a smartphone
based on SM8250.

This submission depends on some other changes that are currently in review:

Tianma TA066VVHM03 panel driver [1]
Support for dsc_slice_per_pkt [2]
Support for V4L2 device tree properties on OV8856 [3]

Additionally, full USB functionality on the bottom port (usb_2) depends on a
vbus-detect-gpios property for qcom,pmic-typec. This device has two USB-C ports
that share the same USBIN input, which interferes with the existing driver's
VBUS based CC detection. Will submit an RFC for that change shortly.

The end impact of this is that if you are plugged into a PC or charger on the
bottom USB (usb_2), you cannot use the side USB (usb_1) for USB flash drives,
etc.

I have left the GT9896 DTS out of this initial submission since the driver is
still in review [4] but I have validated that the touchscreen works with that
driver added and DTS updated so can update once that is merged.

I have also bundled the changes from [5] in this change, I have just put the opp
in the board specific DTS as I cannot validate this on another SM8250 device.

[1]: https://lore.kernel.org/dri-devel/20260308-tianma-ta066vvhm03-v1-0-869fac443b20@pm.me
[2]: https://lore.kernel.org/linux-arm-msm/20251001135914.13754-3-caojunjie650@gmail.com
[3]: https://lore.kernel.org/linux-media/20260307-ov8856-v4l2-props-v1-0-7677b4c658e4@pm.me
[4]: https://lore.kernel.org/linux-input/20260228-gtx8-v2-0-3a408c365f6c@mainlining.org
[5]: https://lore.kernel.org/linux-arm-msm/20260307-sm8250-cpu7-opp-v1-1-435f5f6628a1@pm.me

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
Alexander Koskovich (3):
      dt-bindings: arm: qcom: Add ASUS ROG Phone 3
      arm64: dts: qcom: sm8250: Add label for reserved-memory node
      arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

 Documentation/devicetree/bindings/arm/qcom.yaml |    1 +
 arch/arm64/boot/dts/qcom/Makefile               |    1 +
 arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts | 1328 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/sm8250.dtsi            |    2 +-
 4 files changed, 1331 insertions(+), 1 deletion(-)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260308-sm8250-asus-obiwan-1c1b63ce121c

Best regards,
-- 
Alexander Koskovich <akoskovich@pm.me>

[PATCH 1/3] dt-bindings: arm: qcom: Add ASUS ROG Phone 3

[Alexander Koskovich]

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index d48c625d3fc4..81677c0c5d47 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -1010,6 +1010,7 @@ properties:
 
       - items:
           - enum:
+              - asus,obiwan
               - qcom,qrb5165-rb5
               - qcom,sm8250-hdk
               - qcom,sm8250-mtp

-- 
2.53.0

Re: [PATCH 1/3] dt-bindings: arm: qcom: Add ASUS ROG Phone 3

[Krzysztof Kozlowski]

On Sun, Mar 08, 2026 at 08:40:33PM +0000, Alexander Koskovich wrote:
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Please run scripts/checkpatch.pl on the patches and fix reported
warnings. After that, run also 'scripts/checkpatch.pl --strict' on the
patches and (probably) fix more warnings. Some warnings can be ignored,
especially from --strict run, but the code here looks like it needs a
fix. Feel free to get in touch if the warning is not clear.

Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: arm: qcom: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Monday, March 9th, 2026 at 3:59 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:

> Please run scripts/checkpatch.pl on the patches and fix reported
> warnings. After that, run also 'scripts/checkpatch.pl --strict' on the
> patches and (probably) fix more warnings. Some warnings can be ignored,
> especially from --strict run, but the code here looks like it needs a
> fix. Feel free to get in touch if the warning is not clear.

Ran checkpatch on v2, got a few warnings that seemed like they could be ignored
given context but let me know if they need to be addressed:

Asked for MAINTAINERS to be updated, but from what I can see there is no other
sm8250 board that has a maintainer specifically listed.

Complained about undocumented tianma,ta066vvhm03 binding, but have that
specified as a dependency in the cover letter so ignored it.

Complained about undocumented pci17cb vendor prefix, but this doesn't seem to
be a vendor name so doesn't seem like warning applies? Also already in
sm8250-xiaomi-elish-common.dtsi.

> Best regards,
> Krzysztof
> 
> 

Thanks,
Alex

Re: [PATCH 1/3] dt-bindings: arm: qcom: Add ASUS ROG Phone 3

[Krzysztof Kozlowski]

On 10/03/2026 04:04, Alexander Koskovich wrote:
> On Monday, March 9th, 2026 at 3:59 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> 
>> Please run scripts/checkpatch.pl on the patches and fix reported
>> warnings. After that, run also 'scripts/checkpatch.pl --strict' on the
>> patches and (probably) fix more warnings. Some warnings can be ignored,
>> especially from --strict run, but the code here looks like it needs a
>> fix. Feel free to get in touch if the warning is not clear.
> 
> Ran checkpatch on v2, got a few warnings that seemed like they could be ignored
> given context but let me know if they need to be addressed:
> 
> Asked for MAINTAINERS to be updated, but from what I can see there is no other
> sm8250 board that has a maintainer specifically listed.
> 
> Complained about undocumented tianma,ta066vvhm03 binding, but have that
> specified as a dependency in the cover letter so ignored it.

This one. The way you wrote your cover letter does not really makes it
easy to find it. Especially that it's not even true - DTS cannot depend
on drivers.

Clearly document dependencies and new bindings used by DTS. If you are
going to mix these, your patchset will wait and will not be picked up.

Best regards,
Krzysztof

[PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node

[Alexander Koskovich]

For some devices it makes more sense to just redefine reserved-memory,
for example on the ASUS ROG Phone 3 it is completely different with the
exception of hyp_mem, xbl_aop_mem, cmd_db and smem_mem.

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index c7dffa440074..3298c36c3e55 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -763,7 +763,7 @@ opp-120000000 {
 		};
 	};
 
-	reserved-memory {
+	reserved_memory: reserved-memory {
 		#address-cells = <2>;
 		#size-cells = <2>;
 		ranges;

-- 
2.53.0

Re: [PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node

[Krzysztof Kozlowski]

On Sun, Mar 08, 2026 at 08:40:38PM +0000, Alexander Koskovich wrote:
> For some devices it makes more sense to just redefine reserved-memory,
> for example on the ASUS ROG Phone 3 it is completely different with the
> exception of hyp_mem, xbl_aop_mem, cmd_db and smem_mem.
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-

Same comment as before. This makes no sense as its own patch.

Best regards,
Krzysztof

Re: [PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node

[Krzysztof Kozlowski]

On 09/03/2026 09:00, Krzysztof Kozlowski wrote:
> On Sun, Mar 08, 2026 at 08:40:38PM +0000, Alexander Koskovich wrote:
>> For some devices it makes more sense to just redefine reserved-memory,
>> for example on the ASUS ROG Phone 3 it is completely different with the
>> exception of hyp_mem, xbl_aop_mem, cmd_db and smem_mem.
>>
>> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
>> ---
>>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
> 
> Same comment as before. This makes no sense as its own patch.

And this is v2, not v1!

Best regards,
Krzysztof

Re: [PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node

[Alexander Koskovich]

On Monday, March 9th, 2026 at 4:00 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:

> On 09/03/2026 09:00, Krzysztof Kozlowski wrote:
> > On Sun, Mar 08, 2026 at 08:40:38PM +0000, Alexander Koskovich wrote:
> >> For some devices it makes more sense to just redefine reserved-memory,
> >> for example on the ASUS ROG Phone 3 it is completely different with the
> >> exception of hyp_mem, xbl_aop_mem, cmd_db and smem_mem.
> >>
> >> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> >> ---
> >>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
> >
> > Same comment as before. This makes no sense as its own patch.
> 
> And this is v2, not v1!

Are you saying it should be fully included in the ROG 3 patch instead of being a separate change? Can just include into v2 of the ROG 3 series when I resubmit later if that's the case.

Oops on the version, should I increment version of a patch if the contents themselves haven't changed? Or is it just for any resend of a patch, version should be incremented?

> 
> Best regards,
> Krzysztof
> 

Thanks,
Alex

Re: [PATCH 2/3] arm64: dts: qcom: sm8250: Add label for reserved-memory node

[Konrad Dybcio]

On 3/9/26 9:08 AM, Alexander Koskovich wrote:
> 
> On Monday, March 9th, 2026 at 4:00 AM, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> 
>> On 09/03/2026 09:00, Krzysztof Kozlowski wrote:
>>> On Sun, Mar 08, 2026 at 08:40:38PM +0000, Alexander Koskovich wrote:
>>>> For some devices it makes more sense to just redefine reserved-memory,
>>>> for example on the ASUS ROG Phone 3 it is completely different with the
>>>> exception of hyp_mem, xbl_aop_mem, cmd_db and smem_mem.
>>>>
>>>> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
>>>> ---
>>>>  arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +-
>>>
>>> Same comment as before. This makes no sense as its own patch.
>>
>> And this is v2, not v1!
> 
> Are you saying it should be fully included in the ROG 3 patch instead of being a separate change? Can just include into v2 of the ROG 3 series when I resubmit later if that's the case.

Yes

> Oops on the version, should I increment version of a patch if the contents themselves haven't changed? Or is it just for any resend of a patch, version should be incremented?

All patches in a series should have the same version tag, i.e. it's the
'series version'

Konrad

[PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

Supported functionality as of this initial submission:
* Armor Case & Dock Hall Sensors
* Camera flash/torch LED
* Display (Tianma TA066VVHM03)
* DisplayPort Alt Mode
* Macro Camera (OV8856)
* GPU (Adreno 650)
* NFC (NXP PN553)
* Power Button, Volume Keys
* Regulators
* Remoteprocs (ADSP, CDSP, SLPI)
* UFS
* USB
* Video Codec (Venus)
* Wi-Fi / Bluetooth (QCA6390)

Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
---
 arch/arm64/boot/dts/qcom/Makefile               |    1 +
 arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts | 1328 +++++++++++++++++++++++
 2 files changed, 1329 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index f80b5d9cf1e8..cca71c3884f6 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -307,6 +307,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-microsoft-surface-duo.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-bahamut.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-griffin.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-asus-obiwan.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-samsung-r8q.dtb
diff --git a/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
new file mode 100644
index 000000000000..e414e36e859a
--- /dev/null
+++ b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
@@ -0,0 +1,1328 @@
+// SPDX-License-Identifier: BSD-3-Clause
+
+/dts-v1/;
+
+#include <dt-bindings/arm/qcom,ids.h>
+#include <dt-bindings/clock/qcom,camcc-sm8250.h>
+#include <dt-bindings/leds/common.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
+#include <dt-bindings/usb/pd.h>
+
+#include "sm8250.dtsi"
+#include "pm8150.dtsi" /* PM8250 */
+#include "pm8150b.dtsi"
+#include "pm8150l.dtsi"
+
+/delete-node/ &reserved_memory;
+
+/ {
+	model = "ASUS ROG Phone 3";
+	compatible = "asus,obiwan", "qcom,sm8250";
+	chassis-type = "handset";
+	qcom,board-id = <40 0>;
+	qcom,msm-id = <QCOM_ID_SM8250 0x20001>;
+
+	aliases {
+		serial0 = &uart12;
+		serial1 = &uart6;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	battery: battery {
+		compatible = "simple-battery";
+		voltage-min-design-microvolt = <3400000>;
+		voltage-max-design-microvolt = <4360000>;
+		charge-full-design-microamp-hours = <5800000>;
+		charge-term-current-microamp = <200000>;
+		constant-charge-current-max-microamp = <2750000>;
+		constant-charge-voltage-max-microvolt = <4360000>;
+	};
+
+	gpio_keys: gpio-keys {
+		compatible = "gpio-keys";
+
+		pinctrl-0 = <&volume_up_default>, <&hall_sensors_default>;
+		pinctrl-names = "default";
+
+		event-hall-sensor-case {
+			label = "Hall Effect Sensor (Armor Case)";
+			gpios = <&tlmm 113 GPIO_ACTIVE_LOW>;
+			linux,input-type = <EV_SW>;
+			linux,code = <SW_MACHINE_COVER>;
+			linux,can-disable;
+			wakeup-source;
+		};
+
+		event-hall-sensor-dock {
+			label = "Hall Effect Sensor (Dock)";
+			gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
+			linux,input-type = <EV_SW>;
+			linux,code = <SW_DOCK>;
+			linux,can-disable;
+			wakeup-source;
+		};
+
+		key-vol-up {
+			label = "Volume Up";
+			gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_VOLUMEUP>;
+			debounce-interval = <15>;
+			linux,can-disable;
+			wakeup-source;
+		};
+	};
+
+	qca6390-pmu {
+		compatible = "qcom,qca6390-pmu";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en_default>, <&wlan_en_default>;
+
+		vddaon-supply = <&vreg_s6a>;
+		vddpmu-supply = <&vreg_s6a>;
+		vddrfa0p95-supply = <&vreg_s6a>;
+		vddrfa1p3-supply = <&vreg_s8c>;
+		vddrfa1p9-supply = <&vreg_s5a>;
+		vddpcie1p3-supply = <&vreg_s8c>;
+		vddpcie1p9-supply = <&vreg_s5a>;
+		vddio-supply = <&vreg_s4a>;
+
+		wlan-enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
+		bt-enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
+
+		regulators {
+			vreg_pmu_rfa_cmn: ldo0 {
+				regulator-name = "vreg_pmu_rfa_cmn";
+			};
+
+			vreg_pmu_aon_0p59: ldo1 {
+				regulator-name = "vreg_pmu_aon_0p59";
+			};
+
+			vreg_pmu_wlcx_0p8: ldo2 {
+				regulator-name = "vreg_pmu_wlcx_0p8";
+			};
+
+			vreg_pmu_wlmx_0p85: ldo3 {
+				regulator-name = "vreg_pmu_wlmx_0p85";
+			};
+
+			vreg_pmu_btcmx_0p85: ldo4 {
+				regulator-name = "vreg_pmu_btcmx_0p85";
+			};
+
+			vreg_pmu_rfa_0p8: ldo5 {
+				regulator-name = "vreg_pmu_rfa_0p8";
+			};
+
+			vreg_pmu_rfa_1p2: ldo6 {
+				regulator-name = "vreg_pmu_rfa_1p2";
+			};
+
+			vreg_pmu_rfa_1p7: ldo7 {
+				regulator-name = "vreg_pmu_rfa_1p7";
+			};
+
+			vreg_pmu_pcie_0p9: ldo8 {
+				regulator-name = "vreg_pmu_pcie_0p9";
+			};
+
+			vreg_pmu_pcie_1p8: ldo9 {
+				regulator-name = "vreg_pmu_pcie_1p8";
+			};
+		};
+	};
+
+	reserved_memory: reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		hyp_mem: memory@80000000 {
+			reg = <0x0 0x80000000 0x0 0x600000>;
+			no-map;
+		};
+
+		xbl_aop_mem: memory@80700000 {
+			reg = <0x0 0x80700000 0x0 0x160000>;
+			no-map;
+		};
+
+		cmd_db: memory@80860000 {
+			compatible = "qcom,cmd-db";
+			reg = <0x0 0x80860000 0x0 0x20000>;
+			no-map;
+		};
+
+		smem_mem: memory@80900000 {
+			reg = <0x0 0x80900000 0x0 0x200000>;
+			no-map;
+		};
+
+		removed_mem: memory@80b00000 {
+			reg = <0x0 0x80b00000 0x0 0xb200000>;
+			no-map;
+		};
+
+		camera_mem: memory@8bf00000 {
+			reg = <0x0 0x8bf00000 0x0 0x500000>;
+			no-map;
+		};
+
+		wlan_mem: memory@8c400000 {
+			reg = <0x0 0x8c400000 0x0 0x100000>;
+			no-map;
+		};
+
+		ipa_fw_mem: memory@8c500000 {
+			reg = <0x0 0x8c500000 0x0 0x10000>;
+			no-map;
+		};
+
+		ipa_gsi_mem: memory@8c510000 {
+			reg = <0x0 0x8c510000 0x0 0xa000>;
+			no-map;
+		};
+
+		gpu_mem: memory@8c51a000 {
+			reg = <0x0 0x8c51a000 0x0 0x2000>;
+			no-map;
+		};
+
+		npu_mem: memory@8c600000 {
+			reg = <0x0 0x8c600000 0x0 0x500000>;
+			no-map;
+		};
+
+		video_mem: memory@8cb00000 {
+			reg = <0x0 0x8cb00000 0x0 0x500000>;
+			no-map;
+		};
+
+		cvp_mem: memory@8d000000 {
+			reg = <0x0 0x8d000000 0x0 0x500000>;
+			no-map;
+		};
+
+		cdsp_mem: memory@8d500000 {
+			reg = <0x0 0x8d500000 0x0 0x1400000>;
+			no-map;
+		};
+
+		slpi_mem: memory@8e900000 {
+			reg = <0x0 0x8e900000 0x0 0x1500000>;
+			no-map;
+		};
+
+		adsp_mem: memory@8fe00000 {
+			reg = <0x0 0x8fe00000 0x0 0x1d00000>;
+			no-map;
+		};
+
+		spss_mem: memory@92300000 {
+			reg = <0x0 0x92300000 0x0 0x100000>;
+			no-map;
+		};
+
+		cdsp_secure_heap: memory@92400000 {
+			reg = <0x0 0x92400000 0x0 0x4600000>;
+			no-map;
+		};
+
+		ramoops: ramoops@96a00000 {
+			compatible = "ramoops";
+			reg = <0x0 0x96a00000 0x0 0x400000>;
+			console-size = <0x200000>;
+			pmsg-size = <0x200000>;
+			ecc-size = <16>;
+		};
+
+		asus_debug_mem: memory@97000000 {
+			reg = <0x0 0x97000000 0x0 0x400000>;
+			no-map;
+		};
+	};
+
+	vph_pwr: vph-pwr-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vph_pwr";
+		regulator-min-microvolt = <3700000>;
+		regulator-max-microvolt = <3700000>;
+	};
+
+	vreg_cam_dvdd_1p2: cam-dvdd-1p2-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_cam_dvdd_1p2";
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		regulator-enable-ramp-delay = <233>;
+		gpio = <&pm8150l_gpios 3 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	vreg_pm8150b_vbus: pm8150b-vbus-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_pm8150b_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		vin-supply = <&pm8150b_vbus>;
+	};
+
+	vreg_rt1715_vbus: rt1715-vbus-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_rt1715_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&tlmm 71 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	sbu-mux {
+		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+		enable-gpios = <&tlmm 162 GPIO_ACTIVE_LOW>;
+		select-gpios = <&pm8150l_gpios 1 GPIO_ACTIVE_HIGH>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&sbu_mux_default>, <&sbu_mux_sel_default>;
+
+		vcc-supply = <&vreg_l2a>;
+		mode-switch;
+		orientation-switch;
+
+		port {
+			sbu_mux_in: endpoint {
+				remote-endpoint = <&pm8150b_sbu>;
+			};
+		};
+	};
+
+	vreg_s6c: smpc6-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vreg_s6c";
+
+		regulator-min-microvolt = <880000>;
+		regulator-max-microvolt = <880000>;
+		regulator-always-on;
+
+		vin-supply = <&vph_pwr>;
+	};
+};
+
+&adsp {
+	firmware-name = "qcom/sm8250/asus/obiwan/adsp.mbn";
+
+	status = "okay";
+};
+
+&apps_rsc {
+	regulators-0 {
+		compatible = "qcom,pm8150-rpmh-regulators";
+		qcom,pmic-id = "a";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+		vdd-s7-supply = <&vph_pwr>;
+		vdd-s8-supply = <&vph_pwr>;
+		vdd-s9-supply = <&vph_pwr>;
+		vdd-s10-supply = <&vph_pwr>;
+		vdd-l1-l8-l11-supply = <&vreg_s6c>;
+		vdd-l2-l10-supply = <&vreg_bob>;
+		vdd-l3-l4-l5-l18-supply = <&vreg_s6a>;
+		vdd-l6-l9-supply = <&vreg_s8c>;
+		vdd-l7-l12-l14-l15-supply = <&vreg_s5a>;
+		vdd-l13-l16-l17-supply = <&vreg_bob>;
+
+		vreg_s4a: smps4 {
+			regulator-name = "vreg_s4a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1920000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s5a: smps5 {
+			regulator-name = "vreg_s5a";
+			regulator-min-microvolt = <1900000>;
+			regulator-max-microvolt = <2100000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s6a: smps6 {
+			regulator-name = "vreg_s6a";
+			regulator-min-microvolt = <600000>;
+			regulator-max-microvolt = <1128000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2a: ldo2 {
+			regulator-name = "vreg_l2a";
+			regulator-min-microvolt = <3072000>;
+			regulator-max-microvolt = <3072000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3a: ldo3 {
+			regulator-name = "vreg_l3a";
+			regulator-min-microvolt = <928000>;
+			regulator-max-microvolt = <932000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5a: ldo5 {
+			regulator-name = "vreg_l5a";
+			regulator-min-microvolt = <880000>;
+			regulator-max-microvolt = <880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6a: ldo6 {
+			regulator-name = "vreg_l6a";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7a: ldo7 {
+			regulator-name = "vreg_l7a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l9a: ldo9 {
+			regulator-name = "vreg_l9a";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10a: ldo10 {
+			regulator-name = "vreg_l10a";
+			regulator-min-microvolt = <2960000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l12a: ldo12 {
+			regulator-name = "vreg_l12a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l13a: ldo13 {
+			regulator-name = "vreg_l13a";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l14a: ldo14 {
+			regulator-name = "vreg_l14a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1880000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l15a: ldo15 {
+			regulator-name = "vreg_l15a";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l16a: ldo16 {
+			regulator-name = "vreg_l16a";
+			regulator-min-microvolt = <3024000>;
+			regulator-max-microvolt = <3304000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l17a: ldo17 {
+			regulator-name = "vreg_l17a";
+			regulator-min-microvolt = <2496000>;
+			regulator-max-microvolt = <3008000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l18a: ldo18 {
+			regulator-name = "vreg_l18a";
+			regulator-min-microvolt = <800000>;
+			regulator-max-microvolt = <920000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+
+	regulators-1 {
+		compatible = "qcom,pm8150l-rpmh-regulators";
+		qcom,pmic-id = "c";
+
+		vdd-s1-supply = <&vph_pwr>;
+		vdd-s2-supply = <&vph_pwr>;
+		vdd-s3-supply = <&vph_pwr>;
+		vdd-s4-supply = <&vph_pwr>;
+		vdd-s5-supply = <&vph_pwr>;
+		vdd-s6-supply = <&vph_pwr>;
+		vdd-s7-supply = <&vph_pwr>;
+		vdd-s8-supply = <&vph_pwr>;
+		vdd-l1-l8-supply = <&vreg_s4a>;
+		vdd-l2-l3-supply = <&vreg_s8c>;
+		vdd-l4-l5-l6-supply = <&vreg_bob>;
+		vdd-l7-l11-supply = <&vreg_bob>;
+		vdd-l9-l10-supply = <&vreg_bob>;
+		vdd-bob-supply = <&vph_pwr>;
+
+		vreg_bob: bob {
+			regulator-name = "vreg_bob";
+			regulator-min-microvolt = <3008000>;
+			regulator-max-microvolt = <4000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
+		};
+
+		vreg_s7c: smps7 {
+			regulator-name = "vreg_s7c";
+			regulator-min-microvolt = <348000>;
+			regulator-max-microvolt = <1000000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_s8c: smps8 {
+			regulator-name = "vreg_s8c";
+			regulator-min-microvolt = <1350000>;
+			regulator-max-microvolt = <1400000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l1c: ldo1 {
+			regulator-name = "vreg_l1c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l2c: ldo2 {
+			regulator-name = "vreg_l2c";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1304000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l3c: ldo3 {
+			regulator-name = "vreg_l3c";
+			regulator-min-microvolt = <1200000>;
+			regulator-max-microvolt = <1200000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l4c: ldo4 {
+			regulator-name = "vreg_l4c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l5c: ldo5 {
+			regulator-name = "vreg_l5c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l6c: ldo6 {
+			regulator-name = "vreg_l6c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l7c: ldo7 {
+			regulator-name = "vreg_l7c";
+			regulator-min-microvolt = <2856000>;
+			regulator-max-microvolt = <3104000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l8c: ldo8 {
+			regulator-name = "vreg_l8c";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+			/* Hall sensor VDD */
+			regulator-always-on;
+		};
+
+		vreg_l9c: ldo9 {
+			regulator-name = "vreg_l9c";
+			regulator-min-microvolt = <2704000>;
+			regulator-max-microvolt = <2960000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l10c: ldo10 {
+			regulator-name = "vreg_l10c";
+			regulator-min-microvolt = <3000000>;
+			regulator-max-microvolt = <3312000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+
+		vreg_l11c: ldo11 {
+			regulator-name = "vreg_l11c";
+			regulator-min-microvolt = <3104000>;
+			regulator-max-microvolt = <3304000>;
+			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+		};
+	};
+};
+
+&camss {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l9a>;
+
+	status = "okay";
+
+	ports {
+		port@2 {
+			csiphy2_ep: endpoint {
+				clock-lanes = <7>;
+				data-lanes = <0 1>;
+				remote-endpoint = <&ov8856_ep>;
+			};
+		};
+	};
+};
+
+&cci1 {
+	status = "okay";
+};
+
+&cci1_i2c0 {
+	camera@36 {
+		compatible = "ovti,ov8856";
+		reg = <0x36>;
+
+		rotation = <90>;
+		orientation = <1>;
+
+		reset-gpios = <&tlmm 109 GPIO_ACTIVE_LOW>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&cam_ov8856_default>;
+
+		clocks = <&camcc CAM_CC_MCLK2_CLK>;
+		clock-names = "xvclk";
+		assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
+		assigned-clock-rates = <19200000>;
+
+		dovdd-supply = <&vreg_l6p>;
+		avdd-supply = <&vreg_l5p>;
+		dvdd-supply = <&vreg_cam_dvdd_1p2>;
+
+		port {
+			ov8856_ep: endpoint {
+				link-frequencies = /bits/ 64 <720000000 360000000>;
+				data-lanes = <1 2>;
+				remote-endpoint = <&csiphy2_ep>;
+			};
+		};
+	};
+};
+
+&cdsp {
+	firmware-name = "qcom/sm8250/asus/obiwan/cdsp.mbn";
+
+	status = "okay";
+};
+
+&cpu7_opp_table {
+	cpu7_opp21: opp-3091200000 {
+		opp-hz = /bits/ 64 <3091200000>;
+		opp-peak-kBps = <8368000 51609600>;
+	};
+};
+
+&gmu {
+	status = "okay";
+};
+
+&gpi_dma0 {
+	status = "okay";
+};
+
+&gpi_dma1 {
+	status = "okay";
+};
+
+&gpi_dma2 {
+	status = "okay";
+};
+
+&gpu {
+	status = "okay";
+
+	zap-shader {
+		memory-region = <&gpu_mem>;
+		firmware-name = "qcom/sm8250/asus/obiwan/a650_zap.mbn";
+	};
+};
+
+&i2c1 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	nfc@28 {
+		compatible = "nxp,pn553",
+			     "nxp,nxp-nci-i2c";
+		reg = <0x28>;
+
+		interrupt-parent = <&tlmm>;
+		interrupts = <111 IRQ_TYPE_EDGE_RISING>;
+
+		enable-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>;
+		firmware-gpios = <&tlmm 110 GPIO_ACTIVE_HIGH>;
+
+		pinctrl-0 = <&nfc_en_default>,
+			    <&nfc_clk_req_default>,
+			    <&nfc_firmware_default>,
+			    <&nfc_irq_default>;
+		pinctrl-names = "default";
+	};
+};
+
+&i2c4 {
+	/* AW8697FCR vibrator @ 0x5a */
+
+	status = "okay";
+};
+
+&i2c13 {
+	/* Goodix GT9896 touchscreen @ 0x5d */
+
+	status = "okay";
+};
+
+&i2c15 {
+	status = "okay";
+
+	typec@4e {
+		compatible = "richtek,rt1715";
+		reg = <0x4e>;
+		interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
+		vbus-supply = <&vreg_rt1715_vbus>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&rt1715_irq_default>;
+
+		connector {
+			compatible = "usb-c-connector";
+			power-role = "dual";
+			data-role = "dual";
+			try-power-role = "sink";
+			self-powered;
+			op-sink-microwatt = <10000000>;
+
+			source-pdos = <PDO_FIXED(5000, 500,
+						 PDO_FIXED_DUAL_ROLE |
+						 PDO_FIXED_USB_COMM |
+						 PDO_FIXED_DATA_SWAP)>;
+
+			sink-pdos = <PDO_FIXED(5000, 3000,
+					       PDO_FIXED_DUAL_ROLE |
+					       PDO_FIXED_USB_COMM |
+					       PDO_FIXED_DATA_SWAP)
+				     PDO_FIXED(9000, 2000, 0)>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					rt1715_con_hs: endpoint {
+						remote-endpoint = <&usb_2_dwc3_hs_out>;
+					};
+				};
+			};
+		};
+	};
+
+	pm8008: pmic@8 {
+		compatible = "qcom,pm8008";
+		reg = <0x8>;
+
+		interrupts-extended = <&tlmm 39 IRQ_TYPE_EDGE_RISING>;
+		reset-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+
+		vdd-l1-l2-supply = <&vreg_s8c>;
+		vdd-l3-l4-supply = <&vreg_bob>;
+		vdd-l5-supply = <&vreg_bob>;
+		vdd-l6-supply = <&vreg_s5a>;
+		vdd-l7-supply = <&vreg_bob>;
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&pm8008_default>;
+
+		gpio-controller;
+		#gpio-cells = <2>;
+		gpio-ranges = <&pm8008 0 0 2>;
+
+		interrupt-controller;
+		#interrupt-cells = <2>;
+
+		#thermal-sensor-cells = <0>;
+
+		regulators {
+			vreg_l1p: ldo1 {
+				regulator-name = "vreg_l1p";
+				regulator-min-microvolt = <1104000>;
+				regulator-max-microvolt = <1104000>;
+			};
+
+			vreg_l2p: ldo2 {
+				regulator-name = "vreg_l2p";
+				regulator-min-microvolt = <1104000>;
+				regulator-max-microvolt = <1104000>;
+			};
+
+			vreg_l3p: ldo3 {
+				regulator-name = "vreg_l3p";
+				regulator-min-microvolt = <2856000>;
+				regulator-max-microvolt = <2856000>;
+			};
+
+			vreg_l4p: ldo4 {
+				regulator-name = "vreg_l4p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l5p: ldo5 {
+				regulator-name = "vreg_l5p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+
+			vreg_l6p: ldo6 {
+				regulator-name = "vreg_l6p";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+			};
+
+			vreg_l7p: ldo7 {
+				regulator-name = "vreg_l7p";
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
+			};
+		};
+	};
+};
+
+&i2c16 {
+	/* TFA9874 amplifier (top) @ 0x34 */
+	/* TFA9874 amplifier (bottom) @ 0x35 */
+
+	status = "okay";
+};
+
+&mdss {
+	status = "okay";
+};
+
+&mdss_dp {
+	status = "okay";
+};
+
+&mdss_dp_out {
+	data-lanes = <0 1>;
+	remote-endpoint = <&usb_1_qmpphy_dp_in>;
+};
+
+&mdss_dsi0 {
+	vdda-supply = <&vreg_l9a>;
+
+	status = "okay";
+
+	panel@0 {
+		compatible = "tianma,ta066vvhm03";
+		reg = <0>;
+
+		enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
+
+		vci-supply = <&vreg_l10a>;
+		vdd-supply = <&vreg_l3c>;
+		vddio-supply = <&vreg_l14a>;
+
+		pinctrl-0 = <&disp_en_active>, <&disp_reset_n_active>, <&mdp_vsync>;
+		pinctrl-1 = <&disp_en_suspend>, <&disp_reset_n_suspend>, <&mdp_vsync>;
+		pinctrl-names = "default", "sleep";
+
+		port {
+			panel_in: endpoint {
+				remote-endpoint = <&mdss_dsi0_out>;
+			};
+		};
+	};
+};
+
+&mdss_dsi0_out {
+	data-lanes = <0 1 2 3>;
+	remote-endpoint = <&panel_in>;
+};
+
+&mdss_dsi0_phy {
+	vdds-supply = <&vreg_l5a>;
+
+	status = "okay";
+};
+
+&pcie0 {
+	status = "okay";
+};
+
+&pcie0_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l9a>;
+
+	status = "okay";
+};
+
+&pcieport0 {
+	wifi@0 {
+		compatible = "pci17cb,1101";
+		reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
+		vddaon-supply = <&vreg_pmu_aon_0p59>;
+		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
+		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+		vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
+		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
+		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
+
+		qcom,calibration-variant = "ASUS_ROG_Phone_3";
+	};
+};
+
+&pm8150_gpios {
+	volume_up_default: volume-up-default-state {
+		pins = "gpio6";
+		function = PMIC_GPIO_FUNC_NORMAL;
+		power-source = <1>;
+		input-enable;
+		bias-pull-up;
+	};
+};
+
+&pm8150l_flash {
+	status = "okay";
+
+	led-0 {
+		function = LED_FUNCTION_FLASH;
+		color = <LED_COLOR_ID_WHITE>;
+		led-sources = <1>, <2>;
+		led-max-microamp = <500000>;
+		flash-max-microamp = <1500000>;
+		flash-max-timeout-us = <1280000>;
+	};
+};
+
+&pm8150l_gpios {
+	sbu_mux_sel_default: sbu-mux-sel-default-state {
+		pins = "gpio1";
+		function = PMIC_GPIO_FUNC_NORMAL;
+		power-source = <0>;
+		output-low;
+	};
+};
+
+&pm8150b_gpios {
+	rt1715_mux_en: rt1715-mux-en-default-state {
+		pins = "gpio10";
+		function = PMIC_GPIO_FUNC_NORMAL;
+		power-source = <0>;
+		output-high;
+	};
+};
+
+&pm8150b_typec {
+	vdd-pdphy-supply = <&vreg_l2a>;
+	vdd-vbus-supply = <&vreg_pm8150b_vbus>;
+
+	status = "okay";
+
+	connector {
+		compatible = "usb-c-connector";
+		power-role = "dual";
+		data-role = "dual";
+		try-power-role = "source";
+		self-powered;
+		op-sink-microwatt = <10000000>;
+
+		source-pdos = <PDO_FIXED(5000, 900,
+					 PDO_FIXED_DUAL_ROLE |
+					 PDO_FIXED_USB_COMM |
+					 PDO_FIXED_DATA_SWAP)>;
+
+		sink-pdos = <PDO_FIXED(5000, 3000,
+				       PDO_FIXED_DUAL_ROLE |
+				       PDO_FIXED_USB_COMM |
+				       PDO_FIXED_DATA_SWAP)
+			     PDO_FIXED(9000, 3000, 0)
+			     PDO_FIXED(12000, 2250, 0)>;
+
+		altmodes {
+			displayport {
+				svid = /bits/ 16 <0xff01>;
+				vdo = <0x00001c46>;
+			};
+		};
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				pm8150b_hs: endpoint {
+					remote-endpoint = <&usb_1_dwc3_hs_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				pm8150b_ss: endpoint {
+					remote-endpoint = <&usb_1_qmpphy_out>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				pm8150b_sbu: endpoint {
+					remote-endpoint = <&sbu_mux_in>;
+				};
+			};
+		};
+	};
+};
+
+&pm8150b_vbus {
+	regulator-min-microamp = <500000>;
+	regulator-max-microamp = <3000000>;
+
+	status = "okay";
+};
+
+&pon {
+	mode-bootloader = <0x2>;
+	mode-recovery = <0x1>;
+};
+
+&pon_pwrkey {
+	status = "okay";
+};
+
+&pon_resin {
+	linux,code = <KEY_VOLUMEDOWN>;
+
+	status = "okay";
+};
+
+&qupv3_id_0 {
+	status = "okay";
+};
+
+&qupv3_id_1 {
+	status = "okay";
+};
+
+&qupv3_id_2 {
+	status = "okay";
+};
+
+&slpi {
+	firmware-name = "qcom/sm8250/asus/obiwan/slpi.mbn";
+
+	status = "okay";
+};
+
+&tlmm {
+	gpio-reserved-ranges = <28 4>, /* NXP PN553 eSE (SPI) */
+			       <40 4>; /* Goodix GF9608 UDFPS (SPI) */
+
+	nfc_en_default: nfc-en-default-state {
+		pins = "gpio6";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	nfc_clk_req_default: nfc-clk-req-default-state {
+		pins = "gpio7";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	disp_en_active: disp-en-active-state {
+		pins = "gpio12";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	disp_en_suspend: disp-en-suspend-state {
+		pins = "gpio12";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	wlan_en_default: wlan-default-state {
+		pins = "gpio20";
+		function = "gpio";
+		drive-strength = <16>;
+		output-low;
+		bias-pull-up;
+	};
+
+	bt_en_default: bt-default-state {
+		pins = "gpio21";
+		function = "gpio";
+		drive-strength = <16>;
+		output-low;
+		bias-pull-up;
+	};
+
+	pm8008_default: pm8008-default-state {
+		reset-n-pins {
+			pins = "gpio38";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		irq-pins {
+			pins = "gpio39";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-down;
+		};
+	};
+
+	side_ovp_acok_default: side-ovp-acok-default-state {
+		pins = "gpio60";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	mdp_vsync: mdp-vsync-state {
+		pins = "gpio66";
+		function = "mdp_vsync";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	disp_reset_n_active: disp-reset-n-active-state {
+		pins = "gpio75";
+		function = "gpio";
+		drive-strength = <8>;
+		bias-disable;
+	};
+
+	disp_reset_n_suspend: disp-reset-n-suspend-state {
+		pins = "gpio75";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-down;
+	};
+
+	cam_ov8856_default: cam-ov8856-default-state {
+		mclk-pins {
+			pins = "gpio96";
+			function = "cam_mclk";
+			drive-strength = <16>;
+			bias-disable;
+		};
+
+		reset-n-pins {
+			pins = "gpio109";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+	};
+
+	nfc_firmware_default: nfc-firmware-default-state {
+		pins = "gpio110";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	nfc_irq_default: nfc-irq-default-state {
+		pins = "gpio111";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	hall_sensors_default: hall-sensors-default-state {
+		pins = "gpio113", "gpio121";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+
+	sbu_mux_default: sbu-mux-default-state {
+		pins = "gpio162";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-disable;
+	};
+
+	rt1715_irq_default: rt1715-irq-default-state {
+		pins = "gpio175";
+		function = "gpio";
+		drive-strength = <2>;
+		bias-pull-up;
+	};
+};
+
+&uart12 {
+	/*
+	 * Debug UART routed through a mux with an enable line on
+	 * GPIO 170. The active state is unknown, so data may not
+	 * pass through.
+	 */
+	status = "okay";
+};
+
+&uart6 {
+	status = "okay";
+
+	bluetooth {
+		compatible = "qcom,qca6390-bt";
+
+		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
+		vddaon-supply = <&vreg_pmu_aon_0p59>;
+		vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
+		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+		vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
+	};
+};
+
+&ufs_mem_hc {
+	vcc-supply = <&vreg_l17a>;
+	vcc-max-microamp = <750000>;
+	vccq-supply = <&vreg_l6a>;
+	vccq-max-microamp = <700000>;
+	vccq2-supply = <&vreg_s4a>;
+	vccq2-max-microamp = <750000>;
+
+	status = "okay";
+};
+
+&ufs_mem_phy {
+	vdda-phy-supply = <&vreg_l5a>;
+	vdda-pll-supply = <&vreg_l9a>;
+
+	status = "okay";
+};
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "otg";
+	usb-role-switch;
+};
+
+&usb_1_dwc3_hs_out {
+	remote-endpoint = <&pm8150b_hs>;
+};
+
+&usb_1_hsphy {
+	vdda-pll-supply = <&vreg_l5a>;
+	vdda18-supply = <&vreg_l12a>;
+	vdda33-supply = <&vreg_l2a>;
+
+	qcom,hs-disconnect-bp = <973>;
+	qcom,hs-amplitude-bp = <1110>;
+	qcom,pre-emphasis-amplitude-bp = <10000>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy {
+	mode-switch;
+	orientation-switch;
+
+	vdda-phy-supply = <&vreg_l9a>;
+	vdda-pll-supply = <&vreg_l18a>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy_dp_in {
+	remote-endpoint = <&mdss_dp_out>;
+};
+
+&usb_1_qmpphy_out {
+	remote-endpoint = <&pm8150b_ss>;
+};
+
+&usb_2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rt1715_mux_en>;
+
+	/* Disable USB3 clock requirement as this port only supports USB2 */
+	qcom,select-utmi-as-pipe-clk;
+
+	status = "okay";
+};
+
+&usb_2_dwc3 {
+	dr_mode = "otg";
+	maximum-speed = "high-speed";
+	phys = <&usb_2_hsphy>;
+	phy-names = "usb2-phy";
+	usb-role-switch;
+
+	port {
+		usb_2_dwc3_hs_out: endpoint {
+			remote-endpoint = <&rt1715_con_hs>;
+		};
+	};
+};
+
+&usb_2_hsphy {
+	vdda-pll-supply = <&vreg_l5a>;
+	vdda18-supply = <&vreg_l12a>;
+	vdda33-supply = <&vreg_l2a>;
+
+	qcom,hs-disconnect-bp = <1332>;
+	qcom,hs-amplitude-bp = <2000>;
+	qcom,pre-emphasis-amplitude-bp = <20000>;
+
+	status = "okay";
+};
+
+&venus {
+	firmware-name = "qcom/sm8250/asus/obiwan/venus.mbn";
+
+	status = "okay";
+};

-- 
2.53.0

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Dmitry Baryshkov]

On Sun, Mar 08, 2026 at 08:40:44PM +0000, Alexander Koskovich wrote:
> Supported functionality as of this initial submission:
> * Armor Case & Dock Hall Sensors
> * Camera flash/torch LED
> * Display (Tianma TA066VVHM03)
> * DisplayPort Alt Mode
> * Macro Camera (OV8856)
> * GPU (Adreno 650)
> * NFC (NXP PN553)
> * Power Button, Volume Keys
> * Regulators
> * Remoteprocs (ADSP, CDSP, SLPI)
> * UFS
> * USB
> * Video Codec (Venus)
> * Wi-Fi / Bluetooth (QCA6390)
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---
>  arch/arm64/boot/dts/qcom/Makefile               |    1 +
>  arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts | 1328 +++++++++++++++++++++++
>  2 files changed, 1329 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index f80b5d9cf1e8..cca71c3884f6 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -307,6 +307,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-microsoft-surface-duo.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-bahamut.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8150-sony-xperia-kumano-griffin.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-asus-obiwan.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-hdk.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-mtp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sm8250-samsung-r8q.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
> new file mode 100644
> index 000000000000..e414e36e859a
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/sm8250-asus-obiwan.dts
> @@ -0,0 +1,1328 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +
> +/dts-v1/;
> +
> +#include <dt-bindings/arm/qcom,ids.h>
> +#include <dt-bindings/clock/qcom,camcc-sm8250.h>
> +#include <dt-bindings/leds/common.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
> +#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
> +#include <dt-bindings/usb/pd.h>
> +
> +#include "sm8250.dtsi"
> +#include "pm8150.dtsi" /* PM8250 */
> +#include "pm8150b.dtsi"
> +#include "pm8150l.dtsi"
> +
> +/delete-node/ &reserved_memory;

It's a nice approach, but typically boards just delete reserved memory
nodes one by one. There might be other reservables...

> +
> +/ {
> +	model = "ASUS ROG Phone 3";
> +	compatible = "asus,obiwan", "qcom,sm8250";
> +	chassis-type = "handset";
> +	qcom,board-id = <40 0>;
> +	qcom,msm-id = <QCOM_ID_SM8250 0x20001>;
> +
> +	aliases {
> +		serial0 = &uart12;
> +		serial1 = &uart6;
> +	};
> +
> +	chosen {
> +		stdout-path = "serial0:115200n8";
> +	};
> +
> +	battery: battery {
> +		compatible = "simple-battery";
> +		voltage-min-design-microvolt = <3400000>;
> +		voltage-max-design-microvolt = <4360000>;
> +		charge-full-design-microamp-hours = <5800000>;
> +		charge-term-current-microamp = <200000>;
> +		constant-charge-current-max-microamp = <2750000>;
> +		constant-charge-voltage-max-microvolt = <4360000>;
> +	};
> +
> +	gpio_keys: gpio-keys {
> +		compatible = "gpio-keys";
> +
> +		pinctrl-0 = <&volume_up_default>, <&hall_sensors_default>;
> +		pinctrl-names = "default";
> +
> +		event-hall-sensor-case {
> +			label = "Hall Effect Sensor (Armor Case)";
> +			gpios = <&tlmm 113 GPIO_ACTIVE_LOW>;
> +			linux,input-type = <EV_SW>;
> +			linux,code = <SW_MACHINE_COVER>;
> +			linux,can-disable;
> +			wakeup-source;
> +		};
> +
> +		event-hall-sensor-dock {
> +			label = "Hall Effect Sensor (Dock)";
> +			gpios = <&tlmm 121 GPIO_ACTIVE_LOW>;
> +			linux,input-type = <EV_SW>;
> +			linux,code = <SW_DOCK>;
> +			linux,can-disable;
> +			wakeup-source;
> +		};
> +
> +		key-vol-up {
> +			label = "Volume Up";
> +			gpios = <&pm8150_gpios 6 GPIO_ACTIVE_LOW>;
> +			linux,code = <KEY_VOLUMEUP>;
> +			debounce-interval = <15>;
> +			linux,can-disable;
> +			wakeup-source;
> +		};
> +	};
> +
> +	qca6390-pmu {
> +		compatible = "qcom,qca6390-pmu";
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&bt_en_default>, <&wlan_en_default>;
> +
> +		vddaon-supply = <&vreg_s6a>;
> +		vddpmu-supply = <&vreg_s6a>;
> +		vddrfa0p95-supply = <&vreg_s6a>;
> +		vddrfa1p3-supply = <&vreg_s8c>;
> +		vddrfa1p9-supply = <&vreg_s5a>;
> +		vddpcie1p3-supply = <&vreg_s8c>;
> +		vddpcie1p9-supply = <&vreg_s5a>;
> +		vddio-supply = <&vreg_s4a>;
> +
> +		wlan-enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
> +		bt-enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
> +
> +		regulators {
> +			vreg_pmu_rfa_cmn: ldo0 {
> +				regulator-name = "vreg_pmu_rfa_cmn";
> +			};
> +
> +			vreg_pmu_aon_0p59: ldo1 {
> +				regulator-name = "vreg_pmu_aon_0p59";
> +			};
> +
> +			vreg_pmu_wlcx_0p8: ldo2 {
> +				regulator-name = "vreg_pmu_wlcx_0p8";
> +			};
> +
> +			vreg_pmu_wlmx_0p85: ldo3 {
> +				regulator-name = "vreg_pmu_wlmx_0p85";
> +			};
> +
> +			vreg_pmu_btcmx_0p85: ldo4 {
> +				regulator-name = "vreg_pmu_btcmx_0p85";
> +			};
> +
> +			vreg_pmu_rfa_0p8: ldo5 {
> +				regulator-name = "vreg_pmu_rfa_0p8";
> +			};
> +
> +			vreg_pmu_rfa_1p2: ldo6 {
> +				regulator-name = "vreg_pmu_rfa_1p2";
> +			};
> +
> +			vreg_pmu_rfa_1p7: ldo7 {
> +				regulator-name = "vreg_pmu_rfa_1p7";
> +			};
> +
> +			vreg_pmu_pcie_0p9: ldo8 {
> +				regulator-name = "vreg_pmu_pcie_0p9";
> +			};
> +
> +			vreg_pmu_pcie_1p8: ldo9 {
> +				regulator-name = "vreg_pmu_pcie_1p8";
> +			};
> +		};
> +	};
> +
> +	reserved_memory: reserved-memory {
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +
> +		hyp_mem: memory@80000000 {
> +			reg = <0x0 0x80000000 0x0 0x600000>;
> +			no-map;
> +		};
> +
> +		xbl_aop_mem: memory@80700000 {
> +			reg = <0x0 0x80700000 0x0 0x160000>;
> +			no-map;
> +		};
> +
> +		cmd_db: memory@80860000 {
> +			compatible = "qcom,cmd-db";
> +			reg = <0x0 0x80860000 0x0 0x20000>;
> +			no-map;
> +		};
> +
> +		smem_mem: memory@80900000 {
> +			reg = <0x0 0x80900000 0x0 0x200000>;
> +			no-map;
> +		};
> +
> +		removed_mem: memory@80b00000 {
> +			reg = <0x0 0x80b00000 0x0 0xb200000>;
> +			no-map;
> +		};
> +
> +		camera_mem: memory@8bf00000 {
> +			reg = <0x0 0x8bf00000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		wlan_mem: memory@8c400000 {
> +			reg = <0x0 0x8c400000 0x0 0x100000>;
> +			no-map;
> +		};
> +
> +		ipa_fw_mem: memory@8c500000 {
> +			reg = <0x0 0x8c500000 0x0 0x10000>;
> +			no-map;
> +		};
> +
> +		ipa_gsi_mem: memory@8c510000 {
> +			reg = <0x0 0x8c510000 0x0 0xa000>;
> +			no-map;
> +		};
> +
> +		gpu_mem: memory@8c51a000 {
> +			reg = <0x0 0x8c51a000 0x0 0x2000>;
> +			no-map;
> +		};
> +
> +		npu_mem: memory@8c600000 {
> +			reg = <0x0 0x8c600000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		video_mem: memory@8cb00000 {
> +			reg = <0x0 0x8cb00000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		cvp_mem: memory@8d000000 {
> +			reg = <0x0 0x8d000000 0x0 0x500000>;
> +			no-map;
> +		};
> +
> +		cdsp_mem: memory@8d500000 {
> +			reg = <0x0 0x8d500000 0x0 0x1400000>;
> +			no-map;
> +		};
> +
> +		slpi_mem: memory@8e900000 {
> +			reg = <0x0 0x8e900000 0x0 0x1500000>;
> +			no-map;
> +		};
> +
> +		adsp_mem: memory@8fe00000 {
> +			reg = <0x0 0x8fe00000 0x0 0x1d00000>;
> +			no-map;
> +		};
> +
> +		spss_mem: memory@92300000 {
> +			reg = <0x0 0x92300000 0x0 0x100000>;
> +			no-map;
> +		};
> +
> +		cdsp_secure_heap: memory@92400000 {
> +			reg = <0x0 0x92400000 0x0 0x4600000>;
> +			no-map;
> +		};
> +
> +		ramoops: ramoops@96a00000 {
> +			compatible = "ramoops";
> +			reg = <0x0 0x96a00000 0x0 0x400000>;
> +			console-size = <0x200000>;
> +			pmsg-size = <0x200000>;
> +			ecc-size = <16>;
> +		};
> +
> +		asus_debug_mem: memory@97000000 {
> +			reg = <0x0 0x97000000 0x0 0x400000>;
> +			no-map;
> +		};
> +	};
> +
> +	vph_pwr: vph-pwr-regulator {
> +		compatible = "regulator-fixed";
> +		regulator-name = "vph_pwr";
> +		regulator-min-microvolt = <3700000>;
> +		regulator-max-microvolt = <3700000>;
> +	};
> +
> +	vreg_cam_dvdd_1p2: cam-dvdd-1p2-regulator {

I understand your wish to group the regulator devices, however then
please rename the nodes to have a similar name (e.g. regulator-foo-bar).
Also please place them correspondingly ('qcm6390' < 'regulator' <
'reserved').

> +		compatible = "regulator-fixed";
> +		regulator-name = "vreg_cam_dvdd_1p2";
> +		regulator-min-microvolt = <1200000>;
> +		regulator-max-microvolt = <1200000>;
> +		regulator-enable-ramp-delay = <233>;
> +		gpio = <&pm8150l_gpios 3 GPIO_ACTIVE_HIGH>;
> +		enable-active-high;
> +	};
> +


> +
> +&cpu7_opp_table {
> +	cpu7_opp21: opp-3091200000 {
> +		opp-hz = /bits/ 64 <3091200000>;
> +		opp-peak-kBps = <8368000 51609600>;
> +	};

I'm a bit concerned about this one, I haven't seen it in the downtream
SM8250 DT.

> +};
> +
> +
> +&gpu {
> +	status = "okay";
> +
> +	zap-shader {
> +		memory-region = <&gpu_mem>;

&gpu_zap_shader {
};

> +		firmware-name = "qcom/sm8250/asus/obiwan/a650_zap.mbn";
> +	};
> +};
> +
> +
> +&i2c15 {
> +	status = "okay";
> +
> +	typec@4e {
> +		compatible = "richtek,rt1715";
> +		reg = <0x4e>;
> +		interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
> +		vbus-supply = <&vreg_rt1715_vbus>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&rt1715_irq_default>;
> +
> +		connector {
> +			compatible = "usb-c-connector";
> +			power-role = "dual";
> +			data-role = "dual";
> +			try-power-role = "sink";
> +			self-powered;
> +			op-sink-microwatt = <10000000>;
> +
> +			source-pdos = <PDO_FIXED(5000, 500,
> +						 PDO_FIXED_DUAL_ROLE |
> +						 PDO_FIXED_USB_COMM |
> +						 PDO_FIXED_DATA_SWAP)>;
> +
> +			sink-pdos = <PDO_FIXED(5000, 3000,
> +					       PDO_FIXED_DUAL_ROLE |
> +					       PDO_FIXED_USB_COMM |
> +					       PDO_FIXED_DATA_SWAP)
> +				     PDO_FIXED(9000, 2000, 0)>;
> +
> +			ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +					rt1715_con_hs: endpoint {
> +						remote-endpoint = <&usb_2_dwc3_hs_out>;
> +					};

Just HS, no USB 3.0 support?

> +				};
> +			};
> +		};
> +	};
> +
> +&mdss_dp {
> +	status = "okay";
> +};
> +
> +&mdss_dp_out {
> +	data-lanes = <0 1>;
> +	remote-endpoint = <&usb_1_qmpphy_dp_in>;

Please move endpoint connection to sm8250.dtsi.

> +};
> +
> +&mdss_dsi0 {
> +	vdda-supply = <&vreg_l9a>;
> +
> +	status = "okay";
> +
> +	panel@0 {
> +		compatible = "tianma,ta066vvhm03";
> +		reg = <0>;
> +
> +		enable-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
> +		reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;
> +
> +		vci-supply = <&vreg_l10a>;
> +		vdd-supply = <&vreg_l3c>;
> +		vddio-supply = <&vreg_l14a>;
> +
> +		pinctrl-0 = <&disp_en_active>, <&disp_reset_n_active>, <&mdp_vsync>;
> +		pinctrl-1 = <&disp_en_suspend>, <&disp_reset_n_suspend>, <&mdp_vsync>;
> +		pinctrl-names = "default", "sleep";
> +
> +		port {
> +			panel_in: endpoint {
> +				remote-endpoint = <&mdss_dsi0_out>;
> +			};
> +		};
> +	};
> +};
> +
> +&mdss_dsi0_out {
> +	data-lanes = <0 1 2 3>;
> +	remote-endpoint = <&panel_in>;
> +};
> +
> +&mdss_dsi0_phy {
> +	vdds-supply = <&vreg_l5a>;
> +
> +	status = "okay";
> +};
> +
> +&pcie0 {
> +	status = "okay";
> +};
> +
> +&pcie0_phy {
> +	vdda-phy-supply = <&vreg_l5a>;
> +	vdda-pll-supply = <&vreg_l9a>;
> +
> +	status = "okay";
> +};
> +
> +&pcieport0 {
> +	wifi@0 {
> +		compatible = "pci17cb,1101";
> +		reg = <0x10000 0x0 0x0 0x0 0x0>;
> +
> +		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
> +		vddaon-supply = <&vreg_pmu_aon_0p59>;
> +		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
> +		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
> +		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
> +		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
> +		vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
> +		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
> +		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
> +
> +		qcom,calibration-variant = "ASUS_ROG_Phone_3";

Just to check, was it submitted upstream?

> +	};
> +};
> +
> +
> +
> +&usb_1_dwc3 {
> +	dr_mode = "otg";

This is default and can be dropped

> +	usb-role-switch;

Please move to sm8250.dtsi.

> +};
> +
> +&usb_1_dwc3_hs_out {
> +	remote-endpoint = <&pm8150b_hs>;
> +};
> +
> +&usb_1_hsphy {
> +	vdda-pll-supply = <&vreg_l5a>;
> +	vdda18-supply = <&vreg_l12a>;
> +	vdda33-supply = <&vreg_l2a>;
> +
> +	qcom,hs-disconnect-bp = <973>;
> +	qcom,hs-amplitude-bp = <1110>;
> +	qcom,pre-emphasis-amplitude-bp = <10000>;
> +
> +	status = "okay";
> +};
> +
> +&usb_1_qmpphy {
> +	mode-switch;
> +	orientation-switch;

Please move to sm8250.dtsi.

> +
> +	vdda-phy-supply = <&vreg_l9a>;
> +	vdda-pll-supply = <&vreg_l18a>;
> +
> +	status = "okay";
> +};
> +
> +&usb_1_qmpphy_dp_in {
> +	remote-endpoint = <&mdss_dp_out>;

sm8250.dtsi.

> +};
> +
> +&usb_1_qmpphy_out {
> +	remote-endpoint = <&pm8150b_ss>;
> +};
> +
> +&usb_2 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&rt1715_mux_en>;
> +
> +	/* Disable USB3 clock requirement as this port only supports USB2 */
> +	qcom,select-utmi-as-pipe-clk;

OKay, this answers my earlier question.

> +
> +	status = "okay";
> +};
> +
> +&usb_2_dwc3 {
> +	dr_mode = "otg";

Default, can be dropped.

> +	maximum-speed = "high-speed";
> +	phys = <&usb_2_hsphy>;
> +	phy-names = "usb2-phy";
> +	usb-role-switch;

usb-role-switch can go to sm8250.dtsi.

> +
> +	port {
> +		usb_2_dwc3_hs_out: endpoint {
> +			remote-endpoint = <&rt1715_con_hs>;
> +		};
> +	};
> +};
> +
> +&usb_2_hsphy {
> +	vdda-pll-supply = <&vreg_l5a>;
> +	vdda18-supply = <&vreg_l12a>;
> +	vdda33-supply = <&vreg_l2a>;
> +
> +	qcom,hs-disconnect-bp = <1332>;
> +	qcom,hs-amplitude-bp = <2000>;
> +	qcom,pre-emphasis-amplitude-bp = <20000>;
> +
> +	status = "okay";
> +};
> +
> +&venus {
> +	firmware-name = "qcom/sm8250/asus/obiwan/venus.mbn";
> +
> +	status = "okay";
> +};
> 
> -- 
> 2.53.0
> 
> 

-- 
With best wishes
Dmitry

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Monday, March 9th, 2026 at 4:34 PM, Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote:

> > +
> > +&cpu7_opp_table {
> > +	cpu7_opp21: opp-3091200000 {
> > +		opp-hz = /bits/ 64 <3091200000>;
> > +		opp-peak-kBps = <8368000 51609600>;
> > +	};
> 
> I'm a bit concerned about this one, I haven't seen it in the downtream
> SM8250 DT.

Should I leave it out? I tested for a bit and seems like I can boost to this
speed, seemed fine at least.

> > +		qcom,calibration-variant = "ASUS_ROG_Phone_3";
> 
> Just to check, was it submitted upstream?

Yes, though still waiting for it to be picked up:
https://lore.kernel.org/ath11k/PqqPCfIvgme9VLMd4Q91JxMhlc4JOTjuWhwXupf3_0cZXUvRy0wijwNfy7lAY6fiIXHXU_buPPbpDM_Uvht3G26146R4szD7Hvp57m7Totw=@pm.me

> OKay, this answers my earlier question.

Updated the comment in v2, since technically usb_2 does have SS lanes on this
board, they are just not routed to the port I have configured atm.

The board design is a bit special, the HS lanes for the bottom port are sent
to the pogo port when accesories are in use, and then that leaves the bottom
port exclusively for charging. Haven't gotten to modeling that yet, I'm not
sure if there is a way to model that in upstream atm. Would need some USB mux
binding?

Let me know if you would want to see USB 3 re-enabled despite not having a use atm.

> 
> --
> With best wishes
> Dmitry
> 

All other items have been pushed in v2, appreciate the review.

Thanks,
Alex

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Dmitry Baryshkov]

On Tue, Mar 10, 2026 at 02:57:13AM +0000, Alexander Koskovich wrote:
> On Monday, March 9th, 2026 at 4:34 PM, Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote:
> 
> > > +
> > > +&cpu7_opp_table {
> > > +	cpu7_opp21: opp-3091200000 {
> > > +		opp-hz = /bits/ 64 <3091200000>;
> > > +		opp-peak-kBps = <8368000 51609600>;
> > > +	};
> > 
> > I'm a bit concerned about this one, I haven't seen it in the downtream
> > SM8250 DT.
> 
> Should I leave it out? I tested for a bit and seems like I can boost to this
> speed, seemed fine at least.

Nah, if it is listed in the LUT table of your device, then it should be
fine.

> 
> > > +		qcom,calibration-variant = "ASUS_ROG_Phone_3";
> > 
> > Just to check, was it submitted upstream?
> 
> Yes, though still waiting for it to be picked up:
> https://lore.kernel.org/ath11k/PqqPCfIvgme9VLMd4Q91JxMhlc4JOTjuWhwXupf3_0cZXUvRy0wijwNfy7lAY6fiIXHXU_buPPbpDM_Uvht3G26146R4szD7Hvp57m7Totw=@pm.me

I don't know if that breaks the scripts used by Jeff or not. Your
attachment seems to be lacking the commas.  It is named
"bus=pciqmi-chip-id=0qmi-board-id=23variant=ASUS_ROG_Phone_3.bin",
while it should be "bus=pci,qmi-chip-id=0,qmi-board-id=23,variant=ASUS_ROG_Phone_3.bin".

> 
> > OKay, this answers my earlier question.
> 
> Updated the comment in v2, since technically usb_2 does have SS lanes on this
> board, they are just not routed to the port I have configured atm.

Interesting.

> The board design is a bit special, the HS lanes for the bottom port are sent
> to the pogo port when accesories are in use, and then that leaves the bottom
> port exclusively for charging. Haven't gotten to modeling that yet, I'm not
> sure if there is a way to model that in upstream atm. Would need some USB mux
> binding?

I don't think we support USB muxing in this way.

> 
> Let me know if you would want to see USB 3 re-enabled despite not having a use atm.

I'd at least ask for a comment in the DT.

> 
> > 
> > --
> > With best wishes
> > Dmitry
> > 
> 
> All other items have been pushed in v2, appreciate the review.
> 
> Thanks,
> Alex

-- 
With best wishes
Dmitry

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Monday, March 9th, 2026 at 11:24 PM, Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote:

> > https://lore.kernel.org/ath11k/PqqPCfIvgme9VLMd4Q91JxMhlc4JOTjuWhwXupf3_0cZXUvRy0wijwNfy7lAY6fiIXHXU_buPPbpDM_Uvht3G26146R4szD7Hvp57m7Totw=@pm.me
> 
> I don't know if that breaks the scripts used by Jeff or not. Your
> attachment seems to be lacking the commas.  It is named
> "bus=pciqmi-chip-id=0qmi-board-id=23variant=ASUS_ROG_Phone_3.bin",
> while it should be "bus=pci,qmi-chip-id=0,qmi-board-id=23,variant=ASUS_ROG_Phone_3.bin".

Hmmmm that's odd... I checked my sent folder and the attachment does have the
commas in the preview window, not sure what happened there. More Protonmail
tomfoolery?

Maybe I should resend that through gmail or something.

> 
> --
> With best wishes
> Dmitry
> 
> 

Thanks,
Alex

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Monday, March 9th, 2026 at 11:32 PM, Alexander Koskovich <akoskovich@pm.me> wrote:

> On Monday, March 9th, 2026 at 11:24 PM, Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> wrote:
> 
> > > https://lore.kernel.org/ath11k/PqqPCfIvgme9VLMd4Q91JxMhlc4JOTjuWhwXupf3_0cZXUvRy0wijwNfy7lAY6fiIXHXU_buPPbpDM_Uvht3G26146R4szD7Hvp57m7Totw=@pm.me
> >
> > I don't know if that breaks the scripts used by Jeff or not. Your
> > attachment seems to be lacking the commas.  It is named
> > "bus=pciqmi-chip-id=0qmi-board-id=23variant=ASUS_ROG_Phone_3.bin",
> > while it should be "bus=pci,qmi-chip-id=0,qmi-board-id=23,variant=ASUS_ROG_Phone_3.bin".
> 
> Hmmmm that's odd... I checked my sent folder and the attachment does have the
> commas in the preview window, not sure what happened there. More Protonmail
> tomfoolery?
> 
> Maybe I should resend that through gmail or something.

I resent the board info through my "alexander.koskovich@gmail.com" handle, looks like the commas are intact! :D

> >
> > --
> > With best wishes
> > Dmitry
> >
> >
> 
> Thanks,
> Alex

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Konrad Dybcio]

On 3/8/26 9:40 PM, Alexander Koskovich wrote:
> Supported functionality as of this initial submission:
> * Armor Case & Dock Hall Sensors
> * Camera flash/torch LED
> * Display (Tianma TA066VVHM03)
> * DisplayPort Alt Mode
> * Macro Camera (OV8856)
> * GPU (Adreno 650)
> * NFC (NXP PN553)
> * Power Button, Volume Keys
> * Regulators
> * Remoteprocs (ADSP, CDSP, SLPI)
> * UFS
> * USB
> * Video Codec (Venus)
> * Wi-Fi / Bluetooth (QCA6390)
> 
> Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
> ---

[...]

> +&cci1_i2c0 {
> +	camera@36 {
> +		compatible = "ovti,ov8856";
> +		reg = <0x36>;
> +
> +		rotation = <90>;
> +		orientation = <1>;
> +
> +		reset-gpios = <&tlmm 109 GPIO_ACTIVE_LOW>;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&cam_ov8856_default>;

property-n
property-names

in this order, file-wide, please

[...]

> +&cpu7_opp_table {
> +	cpu7_opp21: opp-3091200000 {
> +		opp-hz = /bits/ 64 <3091200000>;
> +		opp-peak-kBps = <8368000 51609600>;
> +	};
> +};

This, as we've established on some other thread, is fine to put in
8250.dtsi

[...]

> +				port@0 {
> +					reg = <0>;
> +					rt1715_con_hs: endpoint {

\n above, please, to separate the subnode from properties

[...]

> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pm8008_default>;

ditto

[...]

> +			port@0 {
> +				reg = <0>;
> +				pm8150b_hs: endpoint {

ditto

[...]

> +&uart12 {
> +	/*
> +	 * Debug UART routed through a mux with an enable line on
> +	 * GPIO 170. The active state is unknown, so data may not
> +	 * pass through.

Hm? Is that software-triggered, or is there some sort of a debug connector?

Konrad

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Tuesday, March 10th, 2026 at 7:31 AM, Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:

> On 3/8/26 9:40 PM, Alexander Koskovich wrote:
> > +&uart12 {
> > +	/*
> > +	 * Debug UART routed through a mux with an enable line on
> > +	 * GPIO 170. The active state is unknown, so data may not
> > +	 * pass through.
> 
> Hm? Is that software-triggered, or is there some sort of a debug connector?

On second look, it actually looks like there's 2 nets coming out of the mux into the USB charger (bottom port). So could probably craft a debug cable to test this.

Yeah I was assuming that 170 is what triggers UART to actually work on this board, and that bootloader would enable/disable based on a fastboot command or something.

> 
> Konrad
> 
>

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Alexander Koskovich]

On Tuesday, March 10th, 2026 at 11:10 AM, Alexander Koskovich <akoskovich@pm.me> wrote:

> On Tuesday, March 10th, 2026 at 7:31 AM, Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:
> 
> > On 3/8/26 9:40 PM, Alexander Koskovich wrote:
> > > +&uart12 {
> > > +	/*
> > > +	 * Debug UART routed through a mux with an enable line on
> > > +	 * GPIO 170. The active state is unknown, so data may not
> > > +	 * pass through.
> >
> > Hm? Is that software-triggered, or is there some sort of a debug connector?
> 
> On second look, it actually looks like there's 2 nets coming out of the mux into the USB charger (bottom port). So could probably craft a debug cable to test this.
> 
> Yeah I was assuming that 170 is what triggers UART to actually work on this board, and that bootloader would enable/disable based on a fastboot command or something.
>

Picked up a USB test board today, was able to validate that UART is
present on A11/B11 (TX) and A10/B10 (RX). It is also enabled by default
and the enable GPIO is active low. Added a pinctrl to v3 just to be
explicit about it.

Validated that UART works on this device, nice to have.

> >
> > Konrad
> >
> >

Thanks,
Alex

Re: [PATCH 3/3] arm64: dts: qcom: sm8250-asus-obiwan: Add ASUS ROG Phone 3

[Dmitry Baryshkov]

On Wed, Mar 11, 2026 at 02:40:57AM +0000, Alexander Koskovich wrote:
> On Tuesday, March 10th, 2026 at 11:10 AM, Alexander Koskovich <akoskovich@pm.me> wrote:
> 
> > On Tuesday, March 10th, 2026 at 7:31 AM, Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> wrote:
> > 
> > > On 3/8/26 9:40 PM, Alexander Koskovich wrote:
> > > > +&uart12 {
> > > > +	/*
> > > > +	 * Debug UART routed through a mux with an enable line on
> > > > +	 * GPIO 170. The active state is unknown, so data may not
> > > > +	 * pass through.
> > >
> > > Hm? Is that software-triggered, or is there some sort of a debug connector?
> > 
> > On second look, it actually looks like there's 2 nets coming out of the mux into the USB charger (bottom port). So could probably craft a debug cable to test this.
> > 
> > Yeah I was assuming that 170 is what triggers UART to actually work on this board, and that bootloader would enable/disable based on a fastboot command or something.
> >
> 
> Picked up a USB test board today, was able to validate that UART is
> present on A11/B11 (TX) and A10/B10 (RX). It is also enabled by default
> and the enable GPIO is active low. Added a pinctrl to v3 just to be
> explicit about it.
> 
> Validated that UART works on this device, nice to have.

Nice! (I hope the UART pins are documented somewhere)

> 
> > >
> > > Konrad
> > >
> > >
> 
> Thanks,
> Alex

-- 
With best wishes
Dmitry