[PATCH v3,0/3] Add compatible to increase MT8188 audio control

[PATCH v3,0/3] Add compatible to increase MT8188 audio control

[Shuijing Li]

Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC.
Mainly add the following two flag:

1.The audio packet arrangement function is to only arrange audio
packets into the Hblanking area. In order to align with the HW
default setting of g1200, this function needs to be turned off.

2.Due to the difference of HW, different dividers need to be set.

Base on the branch of linus/master v6.4.

Shuijing Li (3):
  dt-bindings: display: mediatek: dp: Add compatible for MediaTek MT8188
  drm/mediatek: dp: Add the audio control to mtk_dp_data struct
  drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

 .../display/mediatek/mediatek,dp.yaml         |  2 +
 drivers/gpu/drm/mediatek/mtk_dp.c             | 47 ++++++++++++++++++-
 drivers/gpu/drm/mediatek/mtk_dp_reg.h         |  6 +++
 3 files changed, 54 insertions(+), 1 deletion(-)

-- 
2.40.1

[PATCH v3,1/3] dt-bindings: display: mediatek: dp: Add compatible for MediaTek MT8188

[Shuijing Li]

Add dt-binding documentation of dp-tx for MediaTek MT8188 SoC.

Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes in v2:
add a mediatek,mt8188-edp-tx compatible per suggestion from the previous thread:
https://lore.kernel.org/lkml/c4a4a900-c80d-b110-f10e-7fa2dae8b7b5@collabora.com/
---
 .../devicetree/bindings/display/mediatek/mediatek,dp.yaml       | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
index ff781f2174a0..2aef1eb32e11 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
@@ -21,6 +21,8 @@ description: |
 properties:
   compatible:
     enum:
+      - mediatek,mt8188-dp-tx
+      - mediatek,mt8188-edp-tx
       - mediatek,mt8195-dp-tx
       - mediatek,mt8195-edp-tx
 
-- 
2.40.1

[PATCH v3,2/3] drm/mediatek: dp: Add the audio packet flag to mtk_dp_data struct

[Shuijing Li]

The audio packet arrangement function is to only arrange audio.
packets into the Hblanking area. In order to align with the HW
default setting of mt8195, this function needs to be turned off.

Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
Changes in v3:
Separate these two things into two different patches.
per suggestion from the previous thread:
https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
Changes in v2:
- change the variables' name to be more descriptive
- add a comment that describes the function of mtk_dp_audio_sample_arrange
- reduce indentation by doing the inverse check
- add a definition of some bits
- add support for mediatek, mt8188-edp-tx
per suggestion from the previous thread:
https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
---
 drivers/gpu/drm/mediatek/mtk_dp.c     | 40 +++++++++++++++++++++++++++
 drivers/gpu/drm/mediatek/mtk_dp_reg.h |  5 ++++
 2 files changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
index 64eee77452c0..d8cda83d6fef 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp.c
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -139,6 +139,7 @@ struct mtk_dp_data {
 	unsigned int smc_cmd;
 	const struct mtk_dp_efuse_fmt *efuse_fmt;
 	bool audio_supported;
+	bool audio_pkt_in_hblank_area;
 };
 
 static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
@@ -1362,6 +1363,18 @@ static void mtk_dp_sdp_set_down_cnt_init_in_hblank(struct mtk_dp *mtk_dp)
 			   SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENC1_P0_MASK);
 }
 
+static void mtk_dp_audio_sample_arrange(struct mtk_dp *mtk_dp)
+{
+	/* arrange audio packets into the Hblanking and Vblanking area */
+	if (!mtk_dp->data->audio_pkt_in_hblank_area)
+		return;
+
+	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
+			   SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK);
+	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
+			   SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK);
+}
+
 static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp)
 {
 	u32 sram_read_start = min_t(u32, MTK_DP_TBC_BUF_READ_START_ADDR,
@@ -1371,6 +1384,7 @@ static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp)
 				    MTK_DP_PIX_PER_ADDR);
 	mtk_dp_set_sram_read_start(mtk_dp, sram_read_start);
 	mtk_dp_setup_encoder(mtk_dp);
+	mtk_dp_audio_sample_arrange(mtk_dp);
 	mtk_dp_sdp_set_down_cnt_init_in_hblank(mtk_dp);
 	mtk_dp_sdp_set_down_cnt_init(mtk_dp, sram_read_start);
 }
@@ -2616,11 +2630,28 @@ static int mtk_dp_resume(struct device *dev)
 
 static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend, mtk_dp_resume);
 
+static const struct mtk_dp_data mt8188_edp_data = {
+	.bridge_type = DRM_MODE_CONNECTOR_eDP,
+	.smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE,
+	.efuse_fmt = mt8195_edp_efuse_fmt,
+	.audio_supported = false,
+	.audio_pkt_in_hblank_area = false,
+};
+
+static const struct mtk_dp_data mt8188_dp_data = {
+	.bridge_type = DRM_MODE_CONNECTOR_DisplayPort,
+	.smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
+	.efuse_fmt = mt8195_dp_efuse_fmt,
+	.audio_supported = true,
+	.audio_pkt_in_hblank_area = true,
+};
+
 static const struct mtk_dp_data mt8195_edp_data = {
 	.bridge_type = DRM_MODE_CONNECTOR_eDP,
 	.smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE,
 	.efuse_fmt = mt8195_edp_efuse_fmt,
 	.audio_supported = false,
+	.audio_pkt_in_hblank_area = false,
 };
 
 static const struct mtk_dp_data mt8195_dp_data = {
@@ -2628,9 +2659,18 @@ static const struct mtk_dp_data mt8195_dp_data = {
 	.smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
 	.efuse_fmt = mt8195_dp_efuse_fmt,
 	.audio_supported = true,
+	.audio_pkt_in_hblank_area = false,
 };
 
 static const struct of_device_id mtk_dp_of_match[] = {
+	{
+		.compatible = "mediatek,mt8188-edp-tx",
+		.data = &mt8188_edp_data,
+	},
+	{
+		.compatible = "mediatek,mt8188-dp-tx",
+		.data = &mt8188_dp_data,
+	},
 	{
 		.compatible = "mediatek,mt8195-edp-tx",
 		.data = &mt8195_edp_data,
diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
index 84e38cef03c2..f38d6ff12afe 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
+++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
@@ -228,6 +228,11 @@
 							 VIDEO_STABLE_CNT_THRD_DP_ENC1_P0 | \
 							 SDP_DP13_EN_DP_ENC1_P0 | \
 							 BS2BS_MODE_DP_ENC1_P0)
+
+#define MTK_DP_ENC1_P0_3374			0x3374
+#define SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK	BIT(12)
+#define SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK		GENMASK(11, 0)
+
 #define MTK_DP_ENC1_P0_33F4			0x33f4
 #define DP_ENC_DUMMY_RW_1_AUDIO_RST_EN			BIT(0)
 #define DP_ENC_DUMMY_RW_1				BIT(9)
-- 
2.40.1

[PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[Shuijing Li]

Due to the difference of HW, different dividers need to be set.

Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
---
Changes in v3:
Separate these two things into two different patches.
per suggestion from the previous thread:
https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
Changes in v2:
- change the variables' name to be more descriptive
- add a comment that describes the function of mtk_dp_audio_sample_arrange
- reduce indentation by doing the inverse check
- add a definition of some bits
- add support for mediatek, mt8188-edp-tx
per suggestion from the previous thread:
https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
---
 drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
 drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
index d8cda83d6fef..8e1a13ab2ba2 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp.c
+++ b/drivers/gpu/drm/mediatek/mtk_dp.c
@@ -140,6 +140,7 @@ struct mtk_dp_data {
 	const struct mtk_dp_efuse_fmt *efuse_fmt;
 	bool audio_supported;
 	bool audio_pkt_in_hblank_area;
+	u16 audio_m_div2_bit;
 };
 
 static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
@@ -648,7 +649,7 @@ static void mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp *mtk_dp,
 static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp)
 {
 	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC,
-			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
+			   mtk_dp->data->audio_m_div2_bit,
 			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK);
 }
 
@@ -2636,6 +2637,7 @@ static const struct mtk_dp_data mt8188_edp_data = {
 	.efuse_fmt = mt8195_edp_efuse_fmt,
 	.audio_supported = false,
 	.audio_pkt_in_hblank_area = false,
+	.audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
 };
 
 static const struct mtk_dp_data mt8188_dp_data = {
@@ -2644,6 +2646,7 @@ static const struct mtk_dp_data mt8188_dp_data = {
 	.efuse_fmt = mt8195_dp_efuse_fmt,
 	.audio_supported = true,
 	.audio_pkt_in_hblank_area = true,
+	.audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
 };
 
 static const struct mtk_dp_data mt8195_edp_data = {
@@ -2652,6 +2655,7 @@ static const struct mtk_dp_data mt8195_edp_data = {
 	.efuse_fmt = mt8195_edp_efuse_fmt,
 	.audio_supported = false,
 	.audio_pkt_in_hblank_area = false,
+	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
 };
 
 static const struct mtk_dp_data mt8195_dp_data = {
@@ -2660,6 +2664,7 @@ static const struct mtk_dp_data mt8195_dp_data = {
 	.efuse_fmt = mt8195_dp_efuse_fmt,
 	.audio_supported = true,
 	.audio_pkt_in_hblank_area = false,
+	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
 };
 
 static const struct of_device_id mtk_dp_of_match[] = {
diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
index f38d6ff12afe..6d7f0405867e 100644
--- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
+++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
@@ -162,6 +162,7 @@
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2	(1 << 8)
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4	(2 << 8)
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8	(3 << 8)
+#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(4 << 8)
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(5 << 8)
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4	(6 << 8)
 #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8	(7 << 8)
-- 
2.40.1

Re: [PATCH v3,2/3] drm/mediatek: dp: Add the audio packet flag to mtk_dp_data struct

[AngeloGioacchino Del Regno]

Il 20/07/23 10:26, Shuijing Li ha scritto:
> The audio packet arrangement function is to only arrange audio.
> packets into the Hblanking area. In order to align with the HW
> default setting of mt8195, this function needs to be turned off.
> 
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[AngeloGioacchino Del Regno]

Il 20/07/23 10:26, Shuijing Li ha scritto:
> Due to the difference of HW, different dividers need to be set.
> 
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Re: [PATCH v3,2/3] drm/mediatek: dp: Add the audio packet flag to mtk_dp_data struct

[Alexandre Mergnat]

Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>

On 20/07/2023 10:26, Shuijing Li wrote:
> The audio packet arrangement function is to only arrange audio.
> packets into the Hblanking area. In order to align with the HW
> default setting of mt8195, this function needs to be turned off.

-- 
Regards,
Alexandre

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[Alexandre Mergnat]

On 20/07/2023 10:26, Shuijing Li wrote:
> Due to the difference of HW, different dividers need to be set.
> 
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
> Changes in v3:
> Separate these two things into two different patches.
> per suggestion from the previous thread:
> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
> Changes in v2:
> - change the variables' name to be more descriptive
> - add a comment that describes the function of mtk_dp_audio_sample_arrange
> - reduce indentation by doing the inverse check
> - add a definition of some bits
> - add support for mediatek, mt8188-edp-tx
> per suggestion from the previous thread:
> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
> ---
>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>   2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
> index d8cda83d6fef..8e1a13ab2ba2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -140,6 +140,7 @@ struct mtk_dp_data {
>   	const struct mtk_dp_efuse_fmt *efuse_fmt;
>   	bool audio_supported;
>   	bool audio_pkt_in_hblank_area;
> +	u16 audio_m_div2_bit;
>   };
>   
>   static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
> @@ -648,7 +649,7 @@ static void mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp *mtk_dp,
>   static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp)
>   {
>   	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC,
> -			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
> +			   mtk_dp->data->audio_m_div2_bit,
>   			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK);
>   }
>   
> @@ -2636,6 +2637,7 @@ static const struct mtk_dp_data mt8188_edp_data = {
>   	.efuse_fmt = mt8195_edp_efuse_fmt,
>   	.audio_supported = false,
>   	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>   };
>   
>   static const struct mtk_dp_data mt8188_dp_data = {
> @@ -2644,6 +2646,7 @@ static const struct mtk_dp_data mt8188_dp_data = {
>   	.efuse_fmt = mt8195_dp_efuse_fmt,
>   	.audio_supported = true,
>   	.audio_pkt_in_hblank_area = true,
> +	.audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>   };
>   
>   static const struct mtk_dp_data mt8195_edp_data = {
> @@ -2652,6 +2655,7 @@ static const struct mtk_dp_data mt8195_edp_data = {
>   	.efuse_fmt = mt8195_edp_efuse_fmt,
>   	.audio_supported = false,
>   	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>   };
>   
>   static const struct mtk_dp_data mt8195_dp_data = {
> @@ -2660,6 +2664,7 @@ static const struct mtk_dp_data mt8195_dp_data = {
>   	.efuse_fmt = mt8195_dp_efuse_fmt,
>   	.audio_supported = true,
>   	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>   };
>   
>   static const struct of_device_id mtk_dp_of_match[] = {
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> index f38d6ff12afe..6d7f0405867e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> @@ -162,6 +162,7 @@
>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2	(1 << 8)
>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4	(2 << 8)
>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8	(3 << 8)
> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(4 << 8)

IMO, it's a bit weird to have SoC specific define in the generic header.
Are you sure this bit is only available for MT8188 ?

>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(5 << 8)
>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4	(6 << 8)
>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8	(7 << 8)

Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>

-- 
Regards,
Alexandre

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[AngeloGioacchino Del Regno]

Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
> 
> 
> On 20/07/2023 10:26, Shuijing Li wrote:
>> Due to the difference of HW, different dividers need to be set.
>>
>> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
>> ---
>> Changes in v3:
>> Separate these two things into two different patches.
>> per suggestion from the previous thread:
>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
>> Changes in v2:
>> - change the variables' name to be more descriptive
>> - add a comment that describes the function of mtk_dp_audio_sample_arrange
>> - reduce indentation by doing the inverse check
>> - add a definition of some bits
>> - add support for mediatek, mt8188-edp-tx
>> per suggestion from the previous thread:
>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
>> ---
>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c
>> index d8cda83d6fef..8e1a13ab2ba2 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
>> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
>> @@ -140,6 +140,7 @@ struct mtk_dp_data {
>>       const struct mtk_dp_efuse_fmt *efuse_fmt;
>>       bool audio_supported;
>>       bool audio_pkt_in_hblank_area;
>> +    u16 audio_m_div2_bit;
>>   };
>>   static const struct mtk_dp_efuse_fmt mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
>> @@ -648,7 +649,7 @@ static void mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp 
>> *mtk_dp,
>>   static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp)
>>   {
>>       mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC,
>> -               AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>> +               mtk_dp->data->audio_m_div2_bit,
>>                  AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK);
>>   }
>> @@ -2636,6 +2637,7 @@ static const struct mtk_dp_data mt8188_edp_data = {
>>       .efuse_fmt = mt8195_edp_efuse_fmt,
>>       .audio_supported = false,
>>       .audio_pkt_in_hblank_area = false,
>> +    .audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>>   };
>>   static const struct mtk_dp_data mt8188_dp_data = {
>> @@ -2644,6 +2646,7 @@ static const struct mtk_dp_data mt8188_dp_data = {
>>       .efuse_fmt = mt8195_dp_efuse_fmt,
>>       .audio_supported = true,
>>       .audio_pkt_in_hblank_area = true,
>> +    .audio_m_div2_bit = MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>>   };
>>   static const struct mtk_dp_data mt8195_edp_data = {
>> @@ -2652,6 +2655,7 @@ static const struct mtk_dp_data mt8195_edp_data = {
>>       .efuse_fmt = mt8195_edp_efuse_fmt,
>>       .audio_supported = false,
>>       .audio_pkt_in_hblank_area = false,
>> +    .audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>>   };
>>   static const struct mtk_dp_data mt8195_dp_data = {
>> @@ -2660,6 +2664,7 @@ static const struct mtk_dp_data mt8195_dp_data = {
>>       .efuse_fmt = mt8195_dp_efuse_fmt,
>>       .audio_supported = true,
>>       .audio_pkt_in_hblank_area = false,
>> +    .audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>>   };
>>   static const struct of_device_id mtk_dp_of_match[] = {
>> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h 
>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>> index f38d6ff12afe..6d7f0405867e 100644
>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>> @@ -162,6 +162,7 @@
>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8)
>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8)
>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8)
>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8)
> 
> IMO, it's a bit weird to have SoC specific define in the generic header.
> Are you sure this bit is only available for MT8188 ?
> 

Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, clearly :-)

>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8)
>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8)
>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8)
> 
> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
> 

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[Alexandre Mergnat]

On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
> Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
>>
>>
>> On 20/07/2023 10:26, Shuijing Li wrote:
>>> Due to the difference of HW, different dividers need to be set.
>>>
>>> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
>>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
>>> ---
>>> Changes in v3:
>>> Separate these two things into two different patches.
>>> per suggestion from the previous thread:
>>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
>>> Changes in v2:
>>> - change the variables' name to be more descriptive
>>> - add a comment that describes the function of 
>>> mtk_dp_audio_sample_arrange
>>> - reduce indentation by doing the inverse check
>>> - add a definition of some bits
>>> - add support for mediatek, mt8188-edp-tx
>>> per suggestion from the previous thread:
>>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
>>> ---
>>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>>
...
>>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>> index f38d6ff12afe..6d7f0405867e 100644
>>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>> @@ -162,6 +162,7 @@
>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8)
>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8)
>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8)
>>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8)
>>
>> IMO, it's a bit weird to have SoC specific define in the generic header.
>> Are you sure this bit is only available for MT8188 ?
>>
> 
> Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, 
> clearly :-)
> 

Ok then, to avoid this kind of issue for other SoCs in the future, is 
that make sense for you to do a SoC specific header file beside the 
generic one?

>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8)
>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8)
>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8)
>>
>> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
>>
> 
> 

-- 
Regards,
Alexandre

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[AngeloGioacchino Del Regno]

Il 20/07/23 14:07, Alexandre Mergnat ha scritto:
> 
> 
> On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
>> Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
>>>
>>>
>>> On 20/07/2023 10:26, Shuijing Li wrote:
>>>> Due to the difference of HW, different dividers need to be set.
>>>>
>>>> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
>>>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
>>>> ---
>>>> Changes in v3:
>>>> Separate these two things into two different patches.
>>>> per suggestion from the previous thread:
>>>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
>>>> Changes in v2:
>>>> - change the variables' name to be more descriptive
>>>> - add a comment that describes the function of mtk_dp_audio_sample_arrange
>>>> - reduce indentation by doing the inverse check
>>>> - add a definition of some bits
>>>> - add support for mediatek, mt8188-edp-tx
>>>> per suggestion from the previous thread:
>>>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
>>>> ---
>>>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>>>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>>>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>>>
> ...
>>>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>> index f38d6ff12afe..6d7f0405867e 100644
>>>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>> @@ -162,6 +162,7 @@
>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8)
>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8)
>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8)
>>>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8)
>>>
>>> IMO, it's a bit weird to have SoC specific define in the generic header.
>>> Are you sure this bit is only available for MT8188 ?
>>>
>>
>> Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, clearly :-)
>>
> 
> Ok then, to avoid this kind of issue for other SoCs in the future, is that make 
> sense for you to do a SoC specific header file beside the generic one?
> 

For just one definition? That's a bit overkill :-)

>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8)
>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8)
>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8)
>>>
>>> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
>>>
>>
>>
> 

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[Alexandre Mergnat]

On 20/07/2023 14:08, AngeloGioacchino Del Regno wrote:
> Il 20/07/23 14:07, Alexandre Mergnat ha scritto:
>>
>>
>> On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
>>> Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
>>>>
>>>>
>>>> On 20/07/2023 10:26, Shuijing Li wrote:
>>>>> Due to the difference of HW, different dividers need to be set.
>>>>>
>>>>> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
>>>>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
>>>>> ---
>>>>> Changes in v3:
>>>>> Separate these two things into two different patches.
>>>>> per suggestion from the previous thread:
>>>>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
>>>>> Changes in v2:
>>>>> - change the variables' name to be more descriptive
>>>>> - add a comment that describes the function of 
>>>>> mtk_dp_audio_sample_arrange
>>>>> - reduce indentation by doing the inverse check
>>>>> - add a definition of some bits
>>>>> - add support for mediatek, mt8188-edp-tx
>>>>> per suggestion from the previous thread:
>>>>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
>>>>> ---
>>>>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>>>>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>>>>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>>>>
>> ...
>>>>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>> index f38d6ff12afe..6d7f0405867e 100644
>>>>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>> @@ -162,6 +162,7 @@
>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8)
>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8)
>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8)
>>>>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8)
>>>>
>>>> IMO, it's a bit weird to have SoC specific define in the generic 
>>>> header.
>>>> Are you sure this bit is only available for MT8188 ?
>>>>
>>>
>>> Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, 
>>> clearly :-)
>>>
>>
>> Ok then, to avoid this kind of issue for other SoCs in the future, is 
>> that make sense for you to do a SoC specific header file beside the 
>> generic one?
>>
> 
> For just one definition? That's a bit overkill :-)
> 

You're right, but we must start somewhere ^^, and show the proper way 
for future patches. Actually, I gave my Reviewed-by because it's only 
one definition. This will be fixed later (I hope).

>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8)
>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8)
>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8)
>>>>
>>>> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
>>>>
>>>
>>>
>>
> 
> 

-- 
Regards,
Alexandre

Re: [PATCH v3,3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[AngeloGioacchino Del Regno]

Il 20/07/23 14:29, Alexandre Mergnat ha scritto:
> 
> 
> On 20/07/2023 14:08, AngeloGioacchino Del Regno wrote:
>> Il 20/07/23 14:07, Alexandre Mergnat ha scritto:
>>>
>>>
>>> On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
>>>> Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
>>>>>
>>>>>
>>>>> On 20/07/2023 10:26, Shuijing Li wrote:
>>>>>> Due to the difference of HW, different dividers need to be set.
>>>>>>
>>>>>> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
>>>>>> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
>>>>>> ---
>>>>>> Changes in v3:
>>>>>> Separate these two things into two different patches.
>>>>>> per suggestion from the previous thread:
>>>>>> https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
>>>>>> Changes in v2:
>>>>>> - change the variables' name to be more descriptive
>>>>>> - add a comment that describes the function of mtk_dp_audio_sample_arrange
>>>>>> - reduce indentation by doing the inverse check
>>>>>> - add a definition of some bits
>>>>>> - add support for mediatek, mt8188-edp-tx
>>>>>> per suggestion from the previous thread:
>>>>>> https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
>>>>>> ---
>>>>>>   drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>>>>>>   drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>>>>>>   2 files changed, 7 insertions(+), 1 deletion(-)
>>>>>>
>>> ...
>>>>>> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>>> index f38d6ff12afe..6d7f0405867e 100644
>>>>>> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>>> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
>>>>>> @@ -162,6 +162,7 @@
>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2    (1 << 8)
>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4    (2 << 8)
>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8    (3 << 8)
>>>>>> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (4 << 8)
>>>>>
>>>>> IMO, it's a bit weird to have SoC specific define in the generic header.
>>>>> Are you sure this bit is only available for MT8188 ?
>>>>>
>>>>
>>>> Eh, the P0_DIV2 bit is 5<<8 for MT8195, while for 8188 it's 4<<8, clearly :-)
>>>>
>>>
>>> Ok then, to avoid this kind of issue for other SoCs in the future, is that make 
>>> sense for you to do a SoC specific header file beside the generic one?
>>>
>>
>> For just one definition? That's a bit overkill :-)
>>
> 
> You're right, but we must start somewhere ^^, and show the proper way for future 
> patches. Actually, I gave my Reviewed-by because it's only one definition. This 
> will be fixed later (I hope).
> 

I'm confident that *if* and when "a bunch" of SoC-specific definitions will
appear, those will be splitted in different headers. :-)

>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2    (5 << 8)
>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4    (6 << 8)
>>>>>>   #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8    (7 << 8)
>>>>>
>>>>> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
>>>>>
>>>>
>>>>
>>>
>>
>>
> 

Re: [PATCH v3, 2/3] drm/mediatek: dp: Add the audio packet flag to mtk_dp_data struct

[CK Hu (胡俊光)]

Hi, Shuijing:

On Thu, 2023-07-20 at 16:26 +0800, Shuijing Li wrote:
> The audio packet arrangement function is to only arrange audio.
> packets into the Hblanking area. In order to align with the HW
> default setting of mt8195, this function needs to be turned off.
> 
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
> Changes in v3:
> Separate these two things into two different patches.
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
> Changes in v2:
> - change the variables' name to be more descriptive
> - add a comment that describes the function of
> mtk_dp_audio_sample_arrange
> - reduce indentation by doing the inverse check
> - add a definition of some bits
> - add support for mediatek, mt8188-edp-tx
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c     | 40
> +++++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_dp_reg.h |  5 ++++
>  2 files changed, 45 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c
> b/drivers/gpu/drm/mediatek/mtk_dp.c
> index 64eee77452c0..d8cda83d6fef 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -139,6 +139,7 @@ struct mtk_dp_data {
>  	unsigned int smc_cmd;
>  	const struct mtk_dp_efuse_fmt *efuse_fmt;
>  	bool audio_supported;
> +	bool audio_pkt_in_hblank_area;
>  };
>  
>  static const struct mtk_dp_efuse_fmt
> mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
> @@ -1362,6 +1363,18 @@ static void
> mtk_dp_sdp_set_down_cnt_init_in_hblank(struct mtk_dp *mtk_dp)
>  			   SDP_DOWN_CNT_INIT_IN_HBLANK_DP_ENC1_P0_MASK)
> ;
>  }
>  
> +static void mtk_dp_audio_sample_arrange(struct mtk_dp *mtk_dp)
> +{
> +	/* arrange audio packets into the Hblanking and Vblanking area
> */
> +	if (!mtk_dp->data->audio_pkt_in_hblank_area)
> +		return;
> +
> +	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
> +			   SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK);
> +	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC1_P0_3374, 0,
> +			   SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK);
> +}
> +
>  static void mtk_dp_setup_tu(struct mtk_dp *mtk_dp)
>  {
>  	u32 sram_read_start = min_t(u32,
> MTK_DP_TBC_BUF_READ_START_ADDR,
> @@ -1371,6 +1384,7 @@ static void mtk_dp_setup_tu(struct mtk_dp
> *mtk_dp)
>  				    MTK_DP_PIX_PER_ADDR);
>  	mtk_dp_set_sram_read_start(mtk_dp, sram_read_start);
>  	mtk_dp_setup_encoder(mtk_dp);
> +	mtk_dp_audio_sample_arrange(mtk_dp);
>  	mtk_dp_sdp_set_down_cnt_init_in_hblank(mtk_dp);
>  	mtk_dp_sdp_set_down_cnt_init(mtk_dp, sram_read_start);
>  }
> @@ -2616,11 +2630,28 @@ static int mtk_dp_resume(struct device *dev)
>  
>  static SIMPLE_DEV_PM_OPS(mtk_dp_pm_ops, mtk_dp_suspend,
> mtk_dp_resume);
>  
> +static const struct mtk_dp_data mt8188_edp_data = {
> +	.bridge_type = DRM_MODE_CONNECTOR_eDP,
> +	.smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE,
> +	.efuse_fmt = mt8195_edp_efuse_fmt,
> +	.audio_supported = false,
> +	.audio_pkt_in_hblank_area = false,
> +};
> +
> +static const struct mtk_dp_data mt8188_dp_data = {
> +	.bridge_type = DRM_MODE_CONNECTOR_DisplayPort,
> +	.smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
> +	.efuse_fmt = mt8195_dp_efuse_fmt,
> +	.audio_supported = true,
> +	.audio_pkt_in_hblank_area = true,
> +};
> +
>  static const struct mtk_dp_data mt8195_edp_data = {
>  	.bridge_type = DRM_MODE_CONNECTOR_eDP,
>  	.smc_cmd = MTK_DP_SIP_ATF_EDP_VIDEO_UNMUTE,
>  	.efuse_fmt = mt8195_edp_efuse_fmt,
>  	.audio_supported = false,
> +	.audio_pkt_in_hblank_area = false,

Global variable is default zero, so this modification is not necessary.

>  };
>  
>  static const struct mtk_dp_data mt8195_dp_data = {
> @@ -2628,9 +2659,18 @@ static const struct mtk_dp_data mt8195_dp_data
> = {
>  	.smc_cmd = MTK_DP_SIP_ATF_VIDEO_UNMUTE,
>  	.efuse_fmt = mt8195_dp_efuse_fmt,
>  	.audio_supported = true,
> +	.audio_pkt_in_hblank_area = false,
>  };
>  
>  static const struct of_device_id mtk_dp_of_match[] = {
> +	{
> +		.compatible = "mediatek,mt8188-edp-tx",
> +		.data = &mt8188_edp_data,

mt8188_edp_data is identical to mt8195_edp_data, so drop
mt8188_edp_data and use mt8188_edp_data here.

Regards,
CK

> +	},
> +	{
> +		.compatible = "mediatek,mt8188-dp-tx",
> +		.data = &mt8188_dp_data,
> +	},
>  	{
>  		.compatible = "mediatek,mt8195-edp-tx",
>  		.data = &mt8195_edp_data,
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> index 84e38cef03c2..f38d6ff12afe 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> @@ -228,6 +228,11 @@
>  							 VIDEO_STABLE_C
> NT_THRD_DP_ENC1_P0 | \
>  							 SDP_DP13_EN_DP
> _ENC1_P0 | \
>  							 BS2BS_MODE_DP_
> ENC1_P0)
> +
> +#define MTK_DP_ENC1_P0_3374			0x3374
> +#define SDP_ASP_INSERT_IN_HBLANK_DP_ENC1_P0_MASK	BIT(12)
> +#define SDP_DOWN_ASP_CNT_INIT_DP_ENC1_P0_MASK		GENMASK
> (11, 0)
> +
>  #define MTK_DP_ENC1_P0_33F4			0x33f4
>  #define DP_ENC_DUMMY_RW_1_AUDIO_RST_EN			BIT(0)
>  #define DP_ENC_DUMMY_RW_1				BIT(9)

Re: [PATCH v3, 3/3] drm/mediatek: dp: Add the audio divider to mtk_dp_data struct

[CK Hu (胡俊光)]

Hi, Shuijing:

On Thu, 2023-07-20 at 16:26 +0800, Shuijing Li wrote:
> Due to the difference of HW, different dividers need to be set.
> 
> Signed-off-by: Shuijing Li <shuijing.li@mediatek.com>
> Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
> ---
> Changes in v3:
> Separate these two things into two different patches.
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/e2ad22bcba31797f38a12a488d4246a01bf0cb2e.camel@mediatek.com/
> Changes in v2:
> - change the variables' name to be more descriptive
> - add a comment that describes the function of
> mtk_dp_audio_sample_arrange
> - reduce indentation by doing the inverse check
> - add a definition of some bits
> - add support for mediatek, mt8188-edp-tx
> per suggestion from the previous thread:
> 
https://lore.kernel.org/lkml/ac0fcec9-a2fe-06cc-c727-189ef7babe9c@collabora.com/
> ---
>  drivers/gpu/drm/mediatek/mtk_dp.c     | 7 ++++++-
>  drivers/gpu/drm/mediatek/mtk_dp_reg.h | 1 +
>  2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c
> b/drivers/gpu/drm/mediatek/mtk_dp.c
> index d8cda83d6fef..8e1a13ab2ba2 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dp.c
> @@ -140,6 +140,7 @@ struct mtk_dp_data {
>  	const struct mtk_dp_efuse_fmt *efuse_fmt;
>  	bool audio_supported;
>  	bool audio_pkt_in_hblank_area;
> +	u16 audio_m_div2_bit;
>  };
>  
>  static const struct mtk_dp_efuse_fmt
> mt8195_edp_efuse_fmt[MTK_DP_CAL_MAX] = {
> @@ -648,7 +649,7 @@ static void
> mtk_dp_audio_sdp_asp_set_channels(struct mtk_dp *mtk_dp,
>  static void mtk_dp_audio_set_divider(struct mtk_dp *mtk_dp)
>  {
>  	mtk_dp_update_bits(mtk_dp, MTK_DP_ENC0_P0_30BC,
> -			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
> +			   mtk_dp->data->audio_m_div2_bit,
>  			   AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MASK);
>  }
>  
> @@ -2636,6 +2637,7 @@ static const struct mtk_dp_data mt8188_edp_data
> = {
>  	.efuse_fmt = mt8195_edp_efuse_fmt,
>  	.audio_supported = false,
>  	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit =
> MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>  };
>  
>  static const struct mtk_dp_data mt8188_dp_data = {
> @@ -2644,6 +2646,7 @@ static const struct mtk_dp_data mt8188_dp_data
> = {
>  	.efuse_fmt = mt8195_dp_efuse_fmt,
>  	.audio_supported = true,
>  	.audio_pkt_in_hblank_area = true,
> +	.audio_m_div2_bit =
> MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>  };
>  
>  static const struct mtk_dp_data mt8195_edp_data = {
> @@ -2652,6 +2655,7 @@ static const struct mtk_dp_data mt8195_edp_data
> = {
>  	.efuse_fmt = mt8195_edp_efuse_fmt,
>  	.audio_supported = false,
>  	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>  };
>  
>  static const struct mtk_dp_data mt8195_dp_data = {
> @@ -2660,6 +2664,7 @@ static const struct mtk_dp_data mt8195_dp_data
> = {
>  	.efuse_fmt = mt8195_dp_efuse_fmt,
>  	.audio_supported = true,
>  	.audio_pkt_in_hblank_area = false,
> +	.audio_m_div2_bit = AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2,
>  };
>  
>  static const struct of_device_id mtk_dp_of_match[] = {
> diff --git a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> index f38d6ff12afe..6d7f0405867e 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> +++ b/drivers/gpu/drm/mediatek/mtk_dp_reg.h
> @@ -162,6 +162,7 @@
>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_2	(1 << 8)
>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_4	(2 << 8)
>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_MUL_8	(3 << 8)
> +#define MT8188_AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(4 <<
> 8)

For AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_*, add prefix 'MT8195_'.
And list all configuration for MT8188.

Regards,
CK

>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_2	(5 << 8)
>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4	(6 << 8)
>  #define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8	(7 << 8)