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([2401:b60:5:867d:3631:b7db:c3f4:aae2]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f72c14ffaasm8954154a91.4.2025.01.19.07.48.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 19 Jan 2025 07:48:08 -0800 (PST) Message-ID: <65f4e27f-3dc4-4eaf-be4d-265ce0325ade@gmail.com> Date: Sun, 19 Jan 2025 23:48:03 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: rockchip: change eth phy mode to rgmii-id for orangepi r1 plus lts To: Dragan Simic Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jonas Karlman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Peter Geis References: <20250119091154.1110762-1-cnsztl@gmail.com> <59893a67-18c7-4ab3-9b2a-5a17091d4b6c@gmail.com> From: Tianling Shen In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 2025/1/19 19:36, Dragan Simic wrote: > On 2025-01-19 12:15, Tianling Shen wrote: >> On 2025/1/19 17:54, Dragan Simic wrote: >>> Thanks for the patch.  Please, see a comment below. >>> >>> On 2025-01-19 10:11, Tianling Shen wrote: >>>> In general the delay should be added by the PHY instead of the MAC, >>>> and this improves network stability on some boards which seem to >>>> need different delay. >>>> >>>> Fixes: 387b3bbac5ea ("arm64: dts: rockchip: Add Xunlong OrangePi R1 >>>> Plus LTS") >>>> Cc: stable@vger.kernel.org # 6.6+ >>>> Signed-off-by: Tianling Shen >>>> --- >>>>  arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts | 3 +-- >>>>  arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts     | 1 + >>>>  arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi    | 1 - >>>>  3 files changed, 2 insertions(+), 3 deletions(-) >>>> >>>> diff --git >>>> a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts >>>> b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts >>>> index 67c246ad8b8c..ec2ce894da1f 100644 >>>> --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts >>>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts >>>> @@ -17,8 +17,7 @@ / { >>>> >>>>  &gmac2io { >>>>      phy-handle = <&yt8531c>; >>>> -    tx_delay = <0x19>; >>>> -    rx_delay = <0x05>; >>>> +    phy-mode = "rgmii-id"; >>> >>> Shouldn't the "tx_delay" and "rx_delay" DT parameters be converted >>> into the "tx-internal-delay-ps" and "rx-internal-delay-ps" parameters, >>> respectively, so the Motorcomm PHY driver can pick them up and >>> actually configure the internal PHY delays? >> >> The documentation[1] says "{t,r}x-internal-delay-ps" default to 1950 >> and that value already works fine on my board. >> >> 1. https://www.kernel.org/doc/Documentation/devicetree/bindings/net/ >> motorcomm%2Cyt8xxx.yaml > > I see, but those values differ from the values found in the > "tx_delay" and "rx_delay" DT parameters, so I think this patch > should be tested with at least one more Orange Pi R1 Plus LTS > board, to make sure it's all still fine. This patch has been tested on 2 boards, and we will do more tests in next week. Thanks, Tianling. > >>> >>>>      status = "okay"; >>>> >>>>      mdio { >>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts >>>> b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts >>>> index 324a8e951f7e..846b931e16d2 100644 >>>> --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts >>>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts >>>> @@ -15,6 +15,7 @@ / { >>>> >>>>  &gmac2io { >>>>      phy-handle = <&rtl8211e>; >>>> +    phy-mode = "rgmii"; >>>>      tx_delay = <0x24>; >>>>      rx_delay = <0x18>; >>>>      status = "okay"; >>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi >>>> b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi >>>> index 4f193704e5dc..09508e324a28 100644 >>>> --- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi >>>> +++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dtsi >>>> @@ -109,7 +109,6 @@ &gmac2io { >>>>      assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; >>>>      assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; >>>>      clock_in_out = "input"; >>>> -    phy-mode = "rgmii"; >>>>      phy-supply = <&vcc_io>; >>>>      pinctrl-0 = <&rgmiim1_pins>; >>>>      pinctrl-names = "default";