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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Khairul Anuar Romli <khairul.anuar.romli@altera.com>,
	Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	"open list:DMA GENERIC OFFLOAD ENGINE SUBSYSTEM"
	<dmaengine@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Niravkumar L Rabara <niravkumar.l.rabara@intel.com>,
	"open list:CADENCE NAND DRIVER" <linux-mtd@lists.infradead.org>,
	Dinh Nguyen <dinguyen@kernel.org>,
	Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
Subject: Re: [PATCH 2/3] dt-bindings: dma: snps,dw-axi-dmac: Add iommu property
Date: Mon, 20 Oct 2025 13:09:11 +0200	[thread overview]
Message-ID: <66c1ebf0-1f91-4d9f-985f-71535f1e3d01@kernel.org> (raw)
In-Reply-To: <b9bcc7542afae659d01553c5559e28e4f01966b1.1760486497.git.khairul.anuar.romli@altera.com>

On 15/10/2025 02:13, Khairul Anuar Romli wrote:
> Agilex5 integrates an ARM SMMU v3 (System Memory Management Unit) with
> dedicated Translation Buffer Units (TBUs) assigned to various peripherals,
> including the Synopsys DesignWare AXI DMA controller.
> 
> Each TBU handles address translation for its associated device by mapping
> stream IDs to memory access permissions and virtual-to-physical address
> mappings via the SMMU core.
> 
> The DesignWare AXI DMAC instances on Agilex5 are connected to their
> respective TBUs. These TBUs forward DMA transactions from the controller
> through the SMMU, enabling IOMMU-based features such as:
> - Address translation for DMA operations
> - Isolation and protection of memory regions accessed by the DMA controller
> - Support for secure and virtualized environments through enforced access
>   control
> 
> To support this configuration, the `iommus` property must be added to the
> binding schema for `snps,dw-axi-dmac`. This allows the device tree to
> associate each DMA controller with the correct SMMU stream ID, enabling
> the Linux IOMMU framework to configure translation contexts at runtime.
> 
> This change documents the IOMMU support for the DMA controller on Agilex5
> and allows proper integration with the SMMUv3 hardware.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com>
> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
> ---
> Changes in v3:
> 	- Refined commit messages with detailed hardware descriptions.
> 	- Remove redundant commit message and add hardware use for iommu.
> Changes in v2:
>         - Updated the commit message to clarify the need for the changes
> 	  and the hardware used of this changes.
> ---
>  Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml | 3 +++
>  1 file changed, 3 insertions(+)

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

  reply	other threads:[~2025-10-20 11:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-15  0:13 [PATCH v3 0/3] Add iommu supports Khairul Anuar Romli
2025-10-15  0:13 ` [PATCH v3 1/3] dt-bindings: mtd: cdns,hp-nfc: Add iommu property Khairul Anuar Romli
2025-10-20 10:33   ` Krzysztof Kozlowski
2025-10-15  0:13 ` [PATCH 2/3] dt-bindings: dma: snps,dw-axi-dmac: " Khairul Anuar Romli
2025-10-20 11:09   ` Krzysztof Kozlowski [this message]
2025-10-15  0:13 ` [PATCH 3/3] arm64: dts: socfpga: agilex5: Add SMMU nodes Khairul Anuar Romli
2025-10-20 15:22 ` [PATCH v3 0/3] Add iommu supports Dinh Nguyen
  -- strict thread matches above, loose matches on Subject: below --
2025-10-13  1:06 [PATCH " Khairul Anuar Romli
2025-10-13  1:06 ` [PATCH 2/3] dt-bindings: dma: snps,dw-axi-dmac: Add iommu property Khairul Anuar Romli

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