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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id mp8-20020a1709071b0800b006efc915e1ccsm2659478ejc.118.2022.04.24.07.51.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 24 Apr 2022 07:51:07 -0700 (PDT) Message-ID: <66e03e68-3a73-1b2e-0694-cba5b072d8e6@linaro.org> Date: Sun, 24 Apr 2022 16:51:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 1/1] dt-bindings: timer: mediatek: Convert binding to YAML Content-Language: en-US To: Allen-KH Cheng , Daniel Lezcano , Thomas Gleixner , Matthias Brugger , Rob Herring , Krzysztof Kozlowski Cc: Project_Global_Chrome_Upstream_Group@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Chen-Yu Tsai , Ryder Lee References: <20220422131317.25410-1-allen-kh.cheng@mediatek.com> <20220422131317.25410-2-allen-kh.cheng@mediatek.com> From: Krzysztof Kozlowski In-Reply-To: <20220422131317.25410-2-allen-kh.cheng@mediatek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 22/04/2022 15:13, Allen-KH Cheng wrote: You should also fix the DTSes to match the new schema. > +$id: http://devicetree.org/schemas/timer/mediatek,mtk-timer.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek SoCs timers bindings > + > +description: > + MediaTek SoCs have two different timers on different platforms, > + - GPT (General Purpose Timer) > + - SYST (System Timer) > + > +maintainers: > + - Fengquan Chen > + - Allen-KH Cheng > + > +properties: > + $nodename: > + pattern: '^timer@[a-f0-9]+$' > + > + compatible: > + oneOf: > + - const: mediatek,mt6577-timer > + - const: mediatek,mt6765-timer These two entries should be an enum. > + - items: > + - enum: > + - mediatek,mt2701-timer > + - mediatek,mt6580-timer > + - mediatek,mt6582-timer > + - mediatek,mt6589-timer > + - mediatek,mt7623-timer > + - mediatek,mt8127-timer > + - mediatek,mt8135-timer > + - mediatek,mt8173-timer > + - mediatek,mt8516-timer > + - const: mediatek,mt6577-timer > + - items: > + - enum: > + - mediatek,mt7629-timer > + - mediatek,mt8183-timer > + - mediatek,mt8186-timer > + - mediatek,mt8192-timer > + - mediatek,mt8195-timer > + - const: mediatek,mt6765-timer > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + minItems: 1 > + items: > + - const: clk13m > + - const: bus When is the bus clock optional? > + > +required: > + - compatible > + - reg clocks are required in the old bindings > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + timer@10008000 { > + compatible = "mediatek,mt6577-timer"; > + reg = <0xd4014000 0x100>; reg does not match unit address. > + interrupts = <13>; > + clocks = <&coreclk 2>; > + }; > + > +... Best regards, Krzysztof