From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Wunderlich <frank-w@public-files.de>
Cc: Frank Wunderlich <linux@fw-web.de>,
linux-rockchip@lists.infradead.org,
Kishon Vijay Abraham I <kishon@ti.com>,
Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Heiko Stuebner <heiko@sntech.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
Yifeng Zhao <yifeng.zhao@rock-chips.com>,
Johan Jonker <jbx6244@gmail.com>,
Peter Geis <pgwipeout@gmail.com>, Simon Xue <xxm@rock-chips.com>,
Liang Chen <cl@rock-chips.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: Aw: Re: Re: [PATCH v5 5/5] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro
Date: Sat, 27 Aug 2022 12:19:53 +0300 [thread overview]
Message-ID: <670dee09-4e37-abb6-dea3-898eb04dd2ee@linaro.org> (raw)
In-Reply-To: <trinity-9006aaf2-5bc2-467c-a86e-ba43efc692e6-1661591668494@3c-app-gmx-bs16>
On 27/08/2022 12:14, Frank Wunderlich wrote:
>> Gesendet: Samstag, 27. August 2022 um 10:56 Uhr
>> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
>
>> On 27/08/2022 11:50, Frank Wunderlich wrote:
>>> Hi
>>>
>>>> Gesendet: Freitag, 26. August 2022 um 08:50 Uhr
>>>> Von: "Krzysztof Kozlowski" <krzysztof.kozlowski@linaro.org>
>>>> On 25/08/2022 22:38, Frank Wunderlich wrote:
>>>>> From: Frank Wunderlich <frank-w@public-files.de>
>>>
>>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
>>>>> index 93d383b8be87..40b90c052634 100644
>>>>> --- a/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
>>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts
>>>>> @@ -86,6 +86,66 @@ vcc5v0_sys: vcc5v0-sys {
>>>>> vin-supply = <&dc_12v>;
>>>>> };
>>>>>
>>>>> + pcie30_avdd0v9: pcie30-avdd0v9 {
>>>>
>>>> Use consistent naming, so if other nodes have "regulator" suffix, use it
>>>> here as well.
>>>
>>> only these 3 new have the suffix:
>>>
>>> vcc3v3_pi6c_05: vcc3v3-pi6c-05-regulator
>>> vcc3v3_minipcie: vcc3v3-minipcie-regulator
>>> vcc3v3_ngff: vcc3v3-ngff-regulator
>>>
>>> so i would drop it there...
>>>
>>> so i end up with (including existing ones to compare):
>>>
>>> vcc3v3_sys: vcc3v3-sys
>>> vcc5v0_sys: vcc5v0-sys
>>> pcie30_avdd0v9: pcie30-avdd0v9
>>> pcie30_avdd1v8: pcie30-avdd1v8
>>> vcc3v3_pi6c_05: vcc3v3-pi6c-05
>>> vcc3v3_minipcie: vcc3v3-minipcie
>>> vcc3v3_ngff: vcc3v3-ngff
>>> vcc5v0_usb: vcc5v0_usb
>>> vcc5v0_usb_host: vcc5v0-usb-host
>>> vcc5v0_usb_otg: vcc5v0-usb-otg
>>>
>>> is this ok?
>>>
>>> maybe swap avdd* and pcie30 part to have voltage in front of function.
>>>
>>
>> I prefer all of them have regulator suffix. I think reasonable is also
>> to rename the old ones and then add new ones with suffix.
>
> ok, will change these to add -regulator in name (not label). and then rename the others in separate Patch outside of the series.
>
> so basicly here
> - pcie30_avdd0v9: pcie30-avdd0v9 {
> + pcie30_avdd0v9: pcie30-avdd0v9-regulator {
> - pcie30_avdd1v8: pcie30-avdd1v8 {
> + pcie30_avdd1v8: pcie30-avdd1v8-regulator {
>
> how about the swapping of pcie30 and the avddXvY? In Schematic they are named PCIE30_AVDD_0V9 / PCIE30_AVDD_1V8, so better leave this?
>
> avdd0v9-pcie30 will be more similar to the other regulators, but inconsistent with Schematic.
Does not matter to me - it is still a specific prefix, so whatever you
put there it's for you, not for me. Keeping something aligned to
schematic - even if not consistently named - makes sense to me.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-08-27 9:20 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-25 19:38 [PATCH v5 0/5] RK3568 PCIe V3 support Frank Wunderlich
2022-08-25 19:38 ` [PATCH v5 1/5] dt-bindings: phy: rockchip: add PCIe v3 phy Frank Wunderlich
2022-09-04 15:06 ` Vinod Koul
2022-10-04 15:09 ` Rob Herring
2022-10-04 15:19 ` Frank Wunderlich
2022-10-04 20:57 ` Sebastian Reichel
2022-10-11 4:41 ` Andrew Powers-Holmes
2022-08-25 19:38 ` [PATCH v5 2/5] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf Frank Wunderlich
2022-08-25 19:38 ` [PATCH v5 3/5] phy: rockchip: Support PCIe v3 Frank Wunderlich
2022-09-04 15:06 ` Vinod Koul
2022-08-25 19:38 ` [PATCH v5 4/5] arm64: dts: rockchip: rk3568: Add PCIe v3 nodes Frank Wunderlich
2022-08-25 19:38 ` [PATCH v5 5/5] arm64: dts: rockchip: Add PCIe v3 nodes to BPI-R2-Pro Frank Wunderlich
2022-08-26 6:50 ` Krzysztof Kozlowski
2022-08-27 8:50 ` Aw: " Frank Wunderlich
2022-08-27 8:56 ` Krzysztof Kozlowski
2022-08-27 9:14 ` Aw: " Frank Wunderlich
2022-08-27 9:19 ` Krzysztof Kozlowski [this message]
2022-09-04 15:28 ` Heiko Stübner
2022-09-04 17:22 ` (subset) [PATCH v5 0/5] RK3568 PCIe V3 support Heiko Stuebner
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=670dee09-4e37-abb6-dea3-898eb04dd2ee@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=cl@rock-chips.com \
--cc=devicetree@vger.kernel.org \
--cc=frank-w@public-files.de \
--cc=heiko@sntech.de \
--cc=jbx6244@gmail.com \
--cc=kishon@ti.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux@fw-web.de \
--cc=p.zabel@pengutronix.de \
--cc=pgwipeout@gmail.com \
--cc=robh+dt@kernel.org \
--cc=shawn.lin@rock-chips.com \
--cc=vkoul@kernel.org \
--cc=xxm@rock-chips.com \
--cc=yifeng.zhao@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).