devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
@ 2022-03-18 11:35 Sherry Sun
  2022-03-18 11:56 ` Krzysztof Kozlowski
  2022-03-18 12:14 ` Krzysztof Kozlowski
  0 siblings, 2 replies; 6+ messages in thread
From: Sherry Sun @ 2022-03-18 11:35 UTC (permalink / raw)
  To: robh+dt, krzk+dt, shawnguo, s.hauer
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-imx

i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.

Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 794d75173cf5..a6124a11d6ee 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -902,6 +902,12 @@
 			interrupt-parent = <&gic>;
 		};
 
+		edacmc: memory-controller@3d400000 {
+			compatible = "snps,ddrc-3.80a";
+			reg = <0x3d400000 0x400000>;
+			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
 		ddr-pmu@3d800000 {
 			compatible = "fsl,imx8mp-ddr-pmu", "fsl,imx8m-ddr-pmu";
 			reg = <0x3d800000 0x400000>;
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
  2022-03-18 11:35 [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp Sherry Sun
@ 2022-03-18 11:56 ` Krzysztof Kozlowski
  2022-03-21  6:18   ` Sherry Sun
  2022-03-18 12:14 ` Krzysztof Kozlowski
  1 sibling, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-18 11:56 UTC (permalink / raw)
  To: Sherry Sun, robh+dt, krzk+dt, shawnguo, s.hauer
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-imx,
	Dinh Nguyen

On 18/03/2022 12:35, Sherry Sun wrote:
> i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
> for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
> 
> Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 794d75173cf5..a6124a11d6ee 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -902,6 +902,12 @@
>  			interrupt-parent = <&gic>;
>  		};
>  
> +		edacmc: memory-controller@3d400000 {
> +			compatible = "snps,ddrc-3.80a";
> +			reg = <0x3d400000 0x400000>;
> +			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;

This is not correct according to the bindings. Dinh's commit adding the
compatible might not be correct, so please first fix bindings.

While fixing bindings, order the compatibles by name (s goes before x).


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
  2022-03-18 11:35 [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp Sherry Sun
  2022-03-18 11:56 ` Krzysztof Kozlowski
@ 2022-03-18 12:14 ` Krzysztof Kozlowski
  2022-03-19  9:53   ` Sherry Sun
  1 sibling, 1 reply; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-18 12:14 UTC (permalink / raw)
  To: Sherry Sun, robh+dt, krzk+dt, shawnguo, s.hauer
  Cc: devicetree, linux-arm-kernel, linux-kernel, linux-imx

On 18/03/2022 12:35, Sherry Sun wrote:
> i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support
> for i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.

One more point - I think it might be worth to add dedicated compatible
for v3.70, as it is clearly a different version (with fallback to v3.80a).


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
  2022-03-18 12:14 ` Krzysztof Kozlowski
@ 2022-03-19  9:53   ` Sherry Sun
  2022-03-19 14:37     ` Krzysztof Kozlowski
  0 siblings, 1 reply; 6+ messages in thread
From: Sherry Sun @ 2022-03-19  9:53 UTC (permalink / raw)
  To: Krzysztof Kozlowski, robh+dt@kernel.org, krzk+dt@kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de
  Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, dl-linux-imx

Hi Krzysztof,

> Subject: Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support
> EDAC on imx8mp
> 
> On 18/03/2022 12:35, Sherry Sun wrote:
> > i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for
> > i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
> 
> One more point - I think it might be worth to add dedicated compatible for
> v3.70, as it is clearly a different version (with fallback to v3.80a).

Thanks for the review, I have check the V3.70a and V3.80a Synopsys ddr controller databook, there is no difference for the inline ECC part.
So do you think we still need to add a new compatible for V3.70a even the EDAC driver operation is totally same with V3.80a?

Best regards
Sherry

> 
> 
> Best regards,
> Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
  2022-03-19  9:53   ` Sherry Sun
@ 2022-03-19 14:37     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 6+ messages in thread
From: Krzysztof Kozlowski @ 2022-03-19 14:37 UTC (permalink / raw)
  To: Sherry Sun, robh+dt@kernel.org, krzk+dt@kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de
  Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, dl-linux-imx

On 19/03/2022 10:53, Sherry Sun wrote:
> Hi Krzysztof,
> 
>> Subject: Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support
>> EDAC on imx8mp
>>
>> On 18/03/2022 12:35, Sherry Sun wrote:
>>> i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for
>>> i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
>>
>> One more point - I think it might be worth to add dedicated compatible for
>> v3.70, as it is clearly a different version (with fallback to v3.80a).
> 
> Thanks for the review, I have check the V3.70a and V3.80a Synopsys ddr controller databook, there is no difference for the inline ECC part.
> So do you think we still need to add a new compatible for V3.70a even the EDAC driver operation is totally same with V3.80a?
> 

Thanks for checking. In such case you don't have to add the compatible.
It still might be beneficial in case there is some difference in
hardware, but looks like not required.


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp
  2022-03-18 11:56 ` Krzysztof Kozlowski
@ 2022-03-21  6:18   ` Sherry Sun
  0 siblings, 0 replies; 6+ messages in thread
From: Sherry Sun @ 2022-03-21  6:18 UTC (permalink / raw)
  To: Krzysztof Kozlowski, robh+dt@kernel.org, krzk+dt@kernel.org,
	shawnguo@kernel.org, s.hauer@pengutronix.de
  Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, dl-linux-imx, Dinh Nguyen

Hi Krzysztof,

> Subject: Re: [PATCH] arm64: dts: imx8mp: add ddr controller node to support
> EDAC on imx8mp
> 
> On 18/03/2022 12:35, Sherry Sun wrote:
> > i.MX8MP use synopsys V3.70a ddr controller IP, so add edac support for
> > i.MX8MP based on "snps,ddrc-3.80a" synopsys edac driver.
> >
> > Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mp.dtsi | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 794d75173cf5..a6124a11d6ee 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -902,6 +902,12 @@
> >  			interrupt-parent = <&gic>;
> >  		};
> >
> > +		edacmc: memory-controller@3d400000 {
> > +			compatible = "snps,ddrc-3.80a";
> > +			reg = <0x3d400000 0x400000>;
> > +			interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> 
> This is not correct according to the bindings. Dinh's commit adding the
> compatible might not be correct, so please first fix bindings.
> 
> While fixing bindings, order the compatibles by name (s goes before x).

I met some issues when run dt_binding_check and dtbs_check for the dt bindings.
So now I cannot observe the errors what you said in the bindings, but from the logic, I guess I may need to add below fix patch, right? Please correct me if I miss something here.

--- a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml
+++ b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml
@@ -24,9 +24,9 @@ description: |
 properties:
   compatible:
     enum:
+      - snps,ddrc-3.80a
       - xlnx,zynq-ddrc-a05
       - xlnx,zynqmp-ddrc-2.40a
-      - snps,ddrc-3.80a

   interrupts:
     maxItems: 1
@@ -43,7 +43,9 @@ allOf:
       properties:
         compatible:
           contains:
-            const: xlnx,zynqmp-ddrc-2.40a
+            enum:
+              - snps,ddrc-3.80a
+              - xlnx,zynqmp-ddrc-2.40a
     then:
       required:
         - interrupts

Best regards
Sherry

> 
> 
> Best regards,
> Krzysztof

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-03-21  6:18 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-03-18 11:35 [PATCH] arm64: dts: imx8mp: add ddr controller node to support EDAC on imx8mp Sherry Sun
2022-03-18 11:56 ` Krzysztof Kozlowski
2022-03-21  6:18   ` Sherry Sun
2022-03-18 12:14 ` Krzysztof Kozlowski
2022-03-19  9:53   ` Sherry Sun
2022-03-19 14:37     ` Krzysztof Kozlowski

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).