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(93-34-91-161.ip49.fastwebnet.it. [93.34.91.161]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385ccd80435sm13308858f8f.100.2024.12.02.12.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2024 12:59:48 -0800 (PST) Message-ID: <674e1fc4.050a0220.a615a.6ff9@mx.google.com> X-Google-Original-Message-ID: Date: Mon, 2 Dec 2024 21:59:45 +0100 From: Christian Marangi To: Rob Herring Cc: Ulf Hansson , "Rafael J. Wysocki" , Viresh Kumar , Krzysztof Kozlowski , Conor Dooley , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@airoha.com Subject: Re: [PATCH v4 1/2] dt-bindings: cpufreq: Document support for Airoha EN7581 CPUFreq References: <20241202151228.32609-1-ansuelsmth@gmail.com> <674dd60f.7b0a0220.2ba255.7b7a@mx.google.com> <20241202205738.GA3149730-robh@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20241202205738.GA3149730-robh@kernel.org> On Mon, Dec 02, 2024 at 02:57:38PM -0600, Rob Herring wrote: > On Mon, Dec 02, 2024 at 04:45:17PM +0100, Christian Marangi wrote: > > On Mon, Dec 02, 2024 at 04:42:33PM +0100, Ulf Hansson wrote: > > > On Mon, 2 Dec 2024 at 16:20, Christian Marangi wrote: > > > > > > > > Document required property for Airoha EN7581 CPUFreq . > > > > > > > > On newer Airoha SoC, CPU Frequency is scaled indirectly with SMCCC commands > > > > to ATF and no clocks are exposed to the OS. > > > > > > > > The SoC have performance state described by ID for each OPP, for this a > > > > Power Domain is used that sets the performance state ID according to the > > > > required OPPs defined in the CPU OPP tables. > > > > > > > > Signed-off-by: Christian Marangi > > > > --- > > > > Changes v4: > > > > - Add this patch > > > > > > > > .../cpufreq/airoha,en7581-cpufreq.yaml | 259 ++++++++++++++++++ > > > > 1 file changed, 259 insertions(+) > > > > create mode 100644 Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml > > > > > > > > diff --git a/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml > > > > new file mode 100644 > > > > index 000000000000..a5bdea7f34b5 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/cpufreq/airoha,en7581-cpufreq.yaml > > > > > > [...] > > > > > > > +examples: > > > > + - | > > > > + / { > > > > + #address-cells = <2>; > > > > + #size-cells = <2>; > > > > + > > > > + cpus { > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + cpu0: cpu@0 { > > > > + device_type = "cpu"; > > > > + compatible = "arm,cortex-a53"; > > > > + reg = <0x0>; > > > > + operating-points-v2 = <&cpu_opp_table>; > > > > + enable-method = "psci"; > > > > + clocks = <&cpufreq>; > > > > + clock-names = "cpu"; > > > > + power-domains = <&cpufreq>; > > > > + power-domain-names = "cpu_pd"; > > > > > > Nitpick: Perhaps clarify the name to be "perf" or "cpu_perf", to > > > indicate it's a power-domain with performance scaling support. > > > > > > > Will change to cpu_perf. Thanks a lot for the review! > > Is that defined in arm/cpus.yaml? No. > > The current choices are perf or psci though those aren't enforced (yet). > Or nothing which is my preference if there is only 1 power domain. > I would also prefer not having to define the names property but I guess that is mandatory for the PD APIs? Maybe Ulf can confirm. -- Ansuel