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[83.9.2.58]) by smtp.gmail.com with ESMTPSA id g24-20020a19ee18000000b004ee85d1444esm2587628lfb.208.2023.05.15.06.08.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 15 May 2023 06:08:26 -0700 (PDT) Message-ID: <68c3f24f-99a2-ad7c-9371-33ccaf5740dd@linaro.org> Date: Mon, 15 May 2023 15:08:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 4/4] arm64: dts: qcom: sm8550: Add video clock controller Content-Language: en-US To: Dmitry Baryshkov Cc: Jagadeesh Kona , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Michael Turquette , Conor Dooley , Bjorn Andersson , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230509161218.11979-1-quic_jkona@quicinc.com> <20230509161218.11979-5-quic_jkona@quicinc.com> <7faf4c16-98ff-f27d-d1fd-3058370c06f5@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15.05.2023 14:57, Dmitry Baryshkov wrote: > On Mon, 15 May 2023 at 15:28, Konrad Dybcio wrote: >> >> >> >> On 9.05.2023 18:12, Jagadeesh Kona wrote: >>> Add device node for video clock controller on Qualcomm SM8550 platform. >>> >>> Signed-off-by: Jagadeesh Kona >>> Signed-off-by: Taniya Das >>> --- >>> arch/arm64/boot/dts/qcom/sm8550.dtsi | 12 ++++++++++++ >>> 1 file changed, 12 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> index 6e9bad8f6f33..e67e7c69dae6 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi >>> @@ -7,6 +7,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> #include >>> #include >>> @@ -759,6 +760,17 @@ gcc: clock-controller@100000 { >>> <&usb_dp_qmpphy QMP_USB43DP_USB3_PIPE_CLK>; >>> }; >>> >>> + videocc: clock-controller@aaf0000 { >> This node should be moved down. Nodes with unit addresses >> should be sorted alphanumerically. >> >>> + compatible = "qcom,sm8550-videocc"; >>> + reg = <0 0x0aaf0000 0 0x10000>; >>> + clocks = <&bi_tcxo_div2>, <&gcc GCC_VIDEO_AHB_CLK>; >> One per line, please >> >> Also, any reason the XO clock does not come from RPMhCC? > > bi_tcxo_div_2 is an RPMhCC clock with the fixed divider. Hm, I don't see it neither on -next or in this patchset.. Konrad > >> >> Konrad >>> + power-domains = <&rpmhpd SM8550_MMCX>; >>> + required-opps = <&rpmhpd_opp_low_svs>; >>> + #clock-cells = <1>; >>> + #reset-cells = <1>; >>> + #power-domain-cells = <1>; >>> + }; >>> + >>> ipcc: mailbox@408000 { >>> compatible = "qcom,sm8550-ipcc", "qcom,ipcc"; >>> reg = <0 0x00408000 0 0x1000>; > > >