Re: Re: [PATCH v7 2/3] PCI: eic7700: Add Eswin PCIe host controller driver

[zhangsenchuan <zhangsenchuan@eswincomputing.com>]

> -----Original Messages-----
> From: "Bjorn Helgaas" <helgaas@kernel.org>
> Send time:Thursday, 11/12/2025 00:43:27
> To: zhangsenchuan@eswincomputing.com
> Cc: bhelgaas@google.com, mani@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, lpieralisi@kernel.org, kwilczynski@kernel.org, robh@kernel.org, p.zabel@pengutronix.de, jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, christian.bruel@foss.st.com, mayank.rana@oss.qualcomm.com, shradha.t@samsung.com, krishna.chundru@oss.qualcomm.com, thippeswamy.havalige@amd.com, inochiama@gmail.com, Frank.li@nxp.com, ningyu@eswincomputing.com, linmin@eswincomputing.com, pinkesh.vaghela@einfochips.com, ouyanghui@eswincomputing.com
> Subject: Re: [PATCH v7 2/3] PCI: eic7700: Add Eswin PCIe host controller driver
> 
> On Tue, Dec 02, 2025 at 05:04:06PM +0800, zhangsenchuan@eswincomputing.com wrote:
> > From: Senchuan Zhang <zhangsenchuan@eswincomputing.com>
> > 
> > Add driver for the Eswin EIC7700 PCIe host controller, which is based on
> > the DesignWare PCIe core, IP revision 5.96a. The PCIe Gen.3 controller
> > supports a data rate of 8 GT/s and 4 channels, support INTx and MSI
> > interrupts.
> 
> > +static int eic7700_pcie_host_init(struct dw_pcie_rp *pp)
> > ...
> > +	/*
> > +	 * The PWR and DBI Reset signals are respectively used to reset the
> > +	 * PCIe controller and the DBI registers.
> > +	 * The PERST# signal is a reset signal that simultaneously controls the
> > +	 * PCIe controller, PHY, and Endpoint.
> > +	 * Before configuring the PHY, the PERST# signal must first be
> > +	 * deasserted.
> > +	 * The external reference clock is supplied simultaneously to the PHY
> > +	 * and EP. When the PHY is configurable, the entire chip already has
> > +	 * stable power and reference clock.
> > +	 * The PHY will be ready within 20ms after writing app_hold_phy_rst
> > +	 * register of ELBI register space.
> 
> Add blank lines between paragraphs.
> 
> > +static int eic7700_pcie_probe(struct platform_device *pdev)
> > ...
> > +	pci->no_pme_handshake = pcie->data->no_pme_handshake;
> 
> This needs to go in the 3/3 "PCI: dwc: Add no_pme_handshake flag and
> skip PME_Turn_Off broadcast" patch because "no_pme_handshake" doesn't
> exist yet so this patch doesn't build by itself.

Hi, Bjorn

Thanks for your comment.
Do I need to adjust the order of the patches?
3/2 "PCI: dwc: Add no_pme_handshake flag and skip PME_Turn_Off broadcast"
3/3 "PCI: eic7700: Add Eswin PCIe host controller driver"

Or merge Patch 2/3 and Patch 3/3?

Kind regards,
Senchuan Zhang
> 
> > +static const struct dev_pm_ops eic7700_pcie_pm_ops = {
> > +	NOIRQ_SYSTEM_SLEEP_PM_OPS(eic7700_pcie_suspend_noirq,
> > +				  eic7700_pcie_resume_noirq)
> > +};
> 
> Use DEFINE_NOIRQ_DEV_PM_OPS() instead.  The collection of PM-related
> macros is confusing to say the least, and they're not used
> consistently across the PCIe drivers, but I *think* the rule of thumb
> should be:
> 
>   Prefer DEFINE_NOIRQ_DEV_PM_OPS() over NOIRQ_SYSTEM_SLEEP_PM_OPS()
>   when possible and omit pm_sleep_ptr() and pm_ptr().

Okey, thanks.
I will use the following combination：
DEFINE_NOIRQ_DEV_PM_OPS(eic7700_pcie_pm, eic7700_pcie_suspend_noirq,
                        eic7700_pcie_resume_noirq);
.pm = &eic7700_pcie_pm,