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[91.118.163.37]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa20df1c53asm66915966b.15.2024.11.14.05.59.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Nov 2024 05:59:42 -0800 (PST) Message-ID: <68f41c2f-3fbe-40bc-a4ec-a6c0ae6862e0@gmail.com> Date: Thu, 14 Nov 2024 14:59:41 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: iio: frequency: Add ADF4382 To: Ciprian Hegbeli , Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kim Seer Paller , Antoniu Miclaus , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20241114130340.7354-1-ciprian.hegbeli@analog.com> <20241114130340.7354-2-ciprian.hegbeli@analog.com> Content-Language: en-US, de-AT From: Javier Carrasco In-Reply-To: <20241114130340.7354-2-ciprian.hegbeli@analog.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 14/11/2024 14:03, Ciprian Hegbeli wrote: > The ADF4382A is a high performance, ultralow jitter, Frac-N PLL > with integrated VCO ideally suited for LO generation for 5G applications > or data converter clock applications. The high performance > PLL has a figure of merit of -239 dBc/Hz, low 1/f Noise and > high PFD frequency of 625MHz in integer mode that can achieve > ultralow in-band noise and integrated jitter. The ADF4382A can > generate frequencies in a fundamental octave range of 11.5 GHz to > 21 GHz, thereby eliminating the need for sub-harmonic filters. The > divide by 2 and 4 output dividers on the part allow frequencies to > be generated from 5.75GHz to 10.5GHz and 2.875GHz to 5.25GHz > respectively. > > Signed-off-by: Ciprian Hegbeli > --- ... > + > + adi,cmos-3v3: > + description: A nitpick I overlooked: default. > + Sets the SPI logic to 3.3V, by defautl it uses 1,8V. > + type: boolean > + maxItems: 1 > +