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Tue, 20 Oct 2026 03:53:08 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b38a1335d3sm5239663a12.3.2026.10.20.03.53.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Oct 2026 03:53:06 -0700 (PDT) Message-ID: <69210508-5b08-4199-8d98-67685c8e90d5@oss.qualcomm.com> Date: Tue, 20 Oct 2026 12:53:03 +0200 X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 5/6] phy: qcom: snps-femto-v2: Move PHY init registers to config tables To: Varadarajan Narayanan , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Manu Gautam , Stephen Boyd , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261009-phy-v6-0-50408e45bcc1@oss.qualcomm.com> <20261009-phy-v6-5-50408e45bcc1@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261009-phy-v6-5-50408e45bcc1@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=DrrDa2/+ c=1 sm=1 tr=0 ts=6ad74815 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=lPcTt8mPJekVWdHiCMEA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDIwMDA0MyBTYWx0ZWRfX88qT5JvrQ0lw rdfORUk7c11aFevLg2jsnmWI0cR4aQTo4y7CCneOdxHEoSwfSWLexvfbObws5swu3nGl+psp/+Y pnZ3hJ6jsvDLKMEfCwDhxkgOaY7MCbwOCqr1UxISqXNFPsl/OsM8JwB9nzMLfX/HgCeuIGUJgRY ynpmMUUl5MRFWHtKmQyQJoyncO5WbJoVhWmg8CI7wmVLQ9ClW64s4EJ484j+OBck3AF7W1g0pGR GvY+kHensuWeJxw+eVETFXWZ4Cei9BmqtO0Gv1BvF8Oq+J/KNzVI84LO0w5zVZCgXJACzuYTDpi jaJdVCUHFsnI7jTAFkl9W2ya6yfnE0PyO4FSy42DL8a02bCV7dLeYTVPhLHBIXyOjn8d3znazDe VfYlxckjsWIiNeX0zijhN/RIiYj41vikZPUQbL36QgMoU2+chJUKg+e7quQnjySyqmg86CZOGJz nAWkPKTsf9YoHki/V7w== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDIwMDA0MyBTYWx0ZWRfX/IiedAPuV8AV JzlpvtuJ89BsL9KymSuG6Mhj3ku9VwNT5IY3LPREFcVPVVXs5x2O6eP9fS8bKEvJZNp2aajOJf5 DKtoZmGLQn7Y3FbUqaNdM3LxWkYd4bU= X-Proofpoint-GUID: BwkU3loCv3GaSTXJoEn74uqb5CMIwqIr X-Proofpoint-ORIG-GUID: BwkU3loCv3GaSTXJoEn74uqb5CMIwqIr X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-20_01,2026-10-19_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 phishscore=0 spamscore=0 adultscore=0 suspectscore=0 bulkscore=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610200043 On 10/9/26 6:49 AM, Varadarajan Narayanan wrote: > The driver currently programs the common PHY register sequence directly in > qcom_snps_hsphy_init(), with the fixed register writes split around the > override parameter handling. This makes it hard to support SoCs that need a > different sequence or different values. > > Move the fixed pre- and post-override register programming into per- > compatible configuration tables, and keep the 7 nm override parameters in > the same match-data structure. This allows the driver to share the common > sequence while adding SoC-specific sequences for future platforms such as > IPQ9650. > > Signed-off-by: Varadarajan Narayanan > --- Reviewed-by: Konrad Dybcio Konrad