From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Ulf Hansson <ulfh@kernel.org>
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-pm@vger.kernel.org,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 09/10] arm64: dts: renesas: Add HiHope RZ/G2M v3.0 SoC main board support
Date: Sat, 22 Aug 2026 09:34:26 +0200 [thread overview]
Message-ID: <69eaebbd-4f24-4167-a8ef-42925a92a4ca@kernel.org> (raw)
In-Reply-To: <20260821150408.73829-10-ayman.chaudhry.kc@renesas.com>
On 21/08/2026 17:03, Ayman Chaudhry wrote:
> Add support for the HiHope RZ/G2M v3.0 (a.k.a. R8A774A3) SoC main
> board.
>
> The RZ/G2M v3.0 SoC main board is similar to the RZ/G2M v1.3 SoC main
> board, so there are already DTSI files available in the kernel. These
> DTSI files will be included once additional support (e.g. I2C, GPIO
> and sound) is added for the RZ/G2M v3.0 SoC.
>
> Signed-off-by: Ayman Chaudhry <ayman.chaudhry.kc@renesas.com>
> ---
> arch/arm64/boot/dts/renesas/Makefile | 2 +
> .../dts/renesas/r8a774a3-hihope-rzg2m.dts | 50 +++++++++++++++++++
> 2 files changed, 52 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
>
> diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
> index 8bf155badd11..6ae96027664d 100644
> --- a/arch/arm64/boot/dts/renesas/Makefile
> +++ b/arch/arm64/boot/dts/renesas/Makefile
> @@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2.dtb
> dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex.dtb
> dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dtb
>
> +dtb-$(CONFIG_ARCH_R8A774A3) += r8a774a3-hihope-rzg2m.dtb
> +
> dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-beacon-rzg2n-kit.dtb
> dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb
> dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb
> diff --git a/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts b/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> new file mode 100644
> index 000000000000..f51ba4fd602e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/renesas/r8a774a3-hihope-rzg2m.dts
> @@ -0,0 +1,50 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the HiHope RZ/G2M v3.0 SoC main board
> + *
> + *Copyright (C) 2026 Renesas Electronics Corp.
> + */
> +
> +/dts-v1/;
> +#include "r8a774a3.dtsi"
> +
> +/ {
> + model = "HopeRun HiHope RZ/G2M v3.0 main board based on r8a774a3";
> + compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a3";
> +
> + memory@48000000 {
> + device_type = "memory";
> + /* First 128MiB is reserved for secure area */
> + reg = <0x0 0x48000000 0x0 0x78000000>;
> + };
> +
> + memory@600000000 {
> + device_type = "memory";
> + reg = <0x6 0x00000000 0x0 0x80000000>;
> + };
> +
> + aliases {
> + serial0 = &scif2;
> + };
> +
> + chosen {
> + bootargs = "ignore_loglevel";
Drop bootargs. Not a mainline DTS attribute. Why should my board ignore
loglevel? How is it hardware description?
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-08-22 7:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-21 15:03 [PATCH 00/10] Add support for Renesas RZ/G2M v3.0 (a.k.a R8A774A3) SoC Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 01/10] soc: renesas: Identify RZ/G2M v3.0 SoC Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 02/10] dt-bindings: power: Add r8a774a3 SYSC power domain definitions Ayman Chaudhry
2026-08-22 7:29 ` Krzysztof Kozlowski
2026-08-21 15:03 ` [PATCH 03/10] pmdomain: renesas: rcar-sys: Add r8a774a3 support Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 04/10] soc: renesas: Enable SYSC driver for r8a774a3 Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 05/10] soc: renesas: rcar-rst: Add support for RZ/G2M v3.0 Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 06/10] dt-bindings: clock: Add r8a774a3 CPG Core Clock definitions Ayman Chaudhry
2026-08-22 7:31 ` Krzysztof Kozlowski
2026-08-21 15:03 ` [PATCH 07/10] clk: renesas: Add support for RZ/G2M v3.0 Ayman Chaudhry
2026-08-21 15:03 ` [PATCH 08/10] arm64: dts: renesas: Add initial SoC DTSI " Ayman Chaudhry
2026-08-22 7:38 ` Krzysztof Kozlowski
2026-08-21 15:03 ` [PATCH 09/10] arm64: dts: renesas: Add HiHope RZ/G2M v3.0 SoC main board support Ayman Chaudhry
2026-08-22 7:34 ` Krzysztof Kozlowski [this message]
2026-08-21 15:03 ` [PATCH 10/10] arm64: dts: renesas: Add HiHope RZ/G2M v3.0 SoC sub " Ayman Chaudhry
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