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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id h19-20020ac24d33000000b004b4ea0f4e25sm1195621lfk.301.2022.12.15.08.09.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Dec 2022 08:09:06 -0800 (PST) Message-ID: <6a906362-f9ae-024f-e788-580256b2564d@linaro.org> Date: Thu, 15 Dec 2022 17:09:04 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH] arm64: dts: qcom: qcs404: use symbol names for PCIe resets Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20221215154824.84198-1-dmitry.baryshkov@linaro.org> From: Konrad Dybcio In-Reply-To: <20221215154824.84198-1-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15.12.2022 16:48, Dmitry Baryshkov wrote: > The commit e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets") added names > for PCIe resets, but it did not change the existing qcs404.dtsi to use > these names. Do it now and use symbol names to make it easier to check > and modify the dtsi in future. > > Fixes: e5bbbff5b7d7 ("clk: gcc-qcs404: Add PCIe resets") > Signed-off-by: Dmitry Baryshkov > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/qcs404.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index a5324eecb50a..502dd6db491e 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -806,7 +806,7 @@ pcie_phy: phy@7786000 { > > clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; > resets = <&gcc GCC_PCIEPHY_0_PHY_BCR>, > - <&gcc 21>; > + <&gcc GCC_PCIE_0_PIPE_ARES>; > reset-names = "phy", "pipe"; > > clock-output-names = "pcie_0_pipe_clk"; > @@ -1336,12 +1336,12 @@ pcie: pci@10000000 { > <&gcc GCC_PCIE_0_SLV_AXI_CLK>; > clock-names = "iface", "aux", "master_bus", "slave_bus"; > > - resets = <&gcc 18>, > - <&gcc 17>, > - <&gcc 15>, > - <&gcc 19>, > + resets = <&gcc GCC_PCIE_0_AXI_MASTER_ARES>, > + <&gcc GCC_PCIE_0_AXI_SLAVE_ARES>, > + <&gcc GCC_PCIE_0_AXI_MASTER_STICKY_ARES>, > + <&gcc GCC_PCIE_0_CORE_STICKY_ARES>, > <&gcc GCC_PCIE_0_BCR>, > - <&gcc 16>; > + <&gcc GCC_PCIE_0_AHB_ARES>; > reset-names = "axi_m", > "axi_s", > "axi_m_sticky",