devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: William Qiu <william.qiu@starfivetech.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>, <linux-pwm@vger.kernel.org>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	Rob Herring <robh+dt@kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Hal Feng <hal.feng@starfivetech.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Subject: Re: [PATCH v6 2/4] pwm: opencores: Add PWM driver support
Date: Mon, 6 Nov 2023 15:26:45 +0800	[thread overview]
Message-ID: <6b57eb4b-241f-4530-b639-5a2e2c55cfd3@starfivetech.com> (raw)
In-Reply-To: <20231102113016.jgsh7jru6vjv4vsp@pengutronix.de>



On 2023/11/2 19:30, Uwe Kleine-König wrote:
> Hello William,
> 
> On Wed, Nov 01, 2023 at 10:22:44AM +0800, William Qiu wrote:
>> 
>> 
>> On 2023/10/20 19:25, Uwe Kleine-König wrote:
>> >> +	void __iomem *base = pwm->data->get_ch_base ?
>> >> +			     pwm->data->get_ch_base(pwm->regs, dev->hwpwm) : pwm->regs;
>> >> +	u32 period_data, duty_data, ctrl_data;
>> >> +
>> >> +	period_data = readl(REG_OCPWM_LRC(base));
>> >> +	duty_data = readl(REG_OCPWM_HRC(base));
>> >> +	ctrl_data = readl(REG_OCPWM_CTRL(base));
>> >> +
>> >> +	state->period = DIV_ROUND_CLOSEST_ULL((u64)period_data * NSEC_PER_SEC, pwm->clk_rate);
>> >> +	state->duty_cycle = DIV_ROUND_CLOSEST_ULL((u64)duty_data * NSEC_PER_SEC, pwm->clk_rate);
>> > 
>> > Please test your driver with PWM_DEBUG enabled. The rounding is wrong
>> > here.
>> 
>> The conclusion after checking is: when the period or duty_cycle value set
>> by the user is not divisible (1000000000/49.5M), there will be an error.
>> This error is due to hardware accuracy. So why is rounding is wrong?
>> rockchip also has a similar implementation drivers/pwm/ pwm-rockchip.c
> 
> I fail to follow. Where is an error?
> 
> The general policy (for new drivers at least) is to implement the
> biggest period possible not bigger than the requested period. That means
> that .apply must round down and to make .apply ∘ .get_state idempotent
> .get_state must round up to match.
> 
> Assuming a clkrate of 49500000 Hz the actual period for REG_OCPWM_LRC =
> 400 is 8080.808ns and for REG_OCPWM_LRC = 401 is 8101.010.
> 
> So with REG_OCPWM_LRC = 401 .get_state should report state.period = 8102
> [ns] because if you call .apply with .period = 8101 [ns] you're supposed
> to use REG_OCPWM_LRC = 400.
> 
> Rounding using DIV_ROUND_CLOSEST doesn't give consistent behaviour in
> some cases. Consider a PWM that can implement the following periods (and
> none in between):
> 
> 	20.1 ns
> 	20.4 ns
> 	21.7 ns
> 
> With round-to-nearest a request to configure 21 ns will yield 20.4 ns.
> If you call .get_state there the driver will return 20 ns. However
> configuring 20 ns results in a period of 20.1 ns.
> 
> With rounding as requested above you get a consistent behaviour. After
> .apply_state(period=21) .get_state() returns period=21.
> 
> Best regards
> Uwe
> 
I see, then we'll use DIV_ROUND_DOWN_ULL for .apply() and DIV_ROUND_UP_ULL
for .get_state().
Thank you for your answer.

Best regards,
William

  reply	other threads:[~2023-11-06  7:26 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-20 10:37 [PATCH v6 0/4] StarFive's Pulse Width Modulation driver support William Qiu
2023-10-20 10:37 ` [PATCH v6 1/4] dt-bindings: pwm: Add OpenCores PWM module William Qiu
2023-10-20 14:21   ` Conor Dooley
2023-10-20 14:22     ` Conor Dooley
2023-10-20 18:04       ` Krzysztof Kozlowski
2023-10-23  8:00     ` William Qiu
2023-10-20 18:01   ` Krzysztof Kozlowski
2023-10-23  8:02     ` William Qiu
2023-10-20 10:37 ` [PATCH v6 2/4] pwm: opencores: Add PWM driver support William Qiu
2023-10-20 11:25   ` Uwe Kleine-König
2023-10-24  9:16     ` William Qiu
2023-10-24 11:45       ` Uwe Kleine-König
2023-10-27 10:23         ` William Qiu
2023-10-27 13:23           ` Uwe Kleine-König
2023-11-01  2:22     ` William Qiu
2023-11-02 11:30       ` Uwe Kleine-König
2023-11-06  7:26         ` William Qiu [this message]
2023-10-20 10:37 ` [PATCH v6 3/4] riscv: dts: starfive: jh7110: Add PWM node and pins configuration William Qiu
2023-10-25 13:45   ` Emil Renner Berthing
2023-10-20 10:37 ` [PATCH v6 4/4] riscv: dts: starfive: jh7100: " William Qiu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6b57eb4b-241f-4530-b639-5a2e2c55cfd3@starfivetech.com \
    --to=william.qiu@starfivetech.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=hal.feng@starfivetech.com \
    --cc=kernel@esmil.dk \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=u.kleine-koenig@pengutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).