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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0715e9d5esm54445a91.17.2026.09.21.20.27.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Sep 2026 20:27:52 -0700 (PDT) Message-ID: <6b8bf779-6494-45b7-9b87-dc62aa4a7220@oss.qualcomm.com> Date: Tue, 22 Sep 2026 11:27:49 +0800 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: shikra: Switch CPU ETMs to MMIO-based probing To: sashiko-reviews@lists.linux.dev Cc: robh@kernel.org, devicetree@vger.kernel.org, conor+dt@kernel.org References: <20260922-fix-etm-probe-issue-on-shikra-v1-1-56d25e9bbe17@oss.qualcomm.com> <20260922031703.54C521F000FF@smtp.kernel.org> Content-Language: en-US From: Jie Gan In-Reply-To: <20260922031703.54C521F000FF@smtp.kernel.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 3EGO7jhqV_bL1c9YQlkvDhaStXaQU-gY X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIyMDA0NSBTYWx0ZWRfX01maw5Fv9H1Z 1Yy4MMq76tW2cyLvhnt0tfvbWic9SdrTBRXb2xanHAHOCBkoeQTlna/3BSkO6yqyMni8RdWQmhF f0Ym16RK3L+0kL3c3ovyErsN4H0Umuk= X-Authority-Analysis: v=2.4 cv=U+4Hnuru c=1 sm=1 tr=0 ts=6ab1f5ba cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=9PwK0JBZ0THiR8dXEk0A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: 3EGO7jhqV_bL1c9YQlkvDhaStXaQU-gY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIyMDA0NSBTYWx0ZWRfXwHRauwHtcKMw oAx0BY7xoOmq9+Ke1HoHs3bApWnmBp/nGUetyuRGzUAVwF65tzeVA9auziN8fvGu2VQNv9iVi/2 P5JTV5lbt3fURFRiE7+q0wA4Q3GmY0Z4stAmdoR78BPbBAd2Gnp7vtQ/AYqNueBV7bOSxgkJTPd nKFRpA+NQJV31fcwHJN7XhF592kLaeaG0ttI4PHhkIp537uZOzl446H8IpghTqOuCzkiiNLjMxa 4D05gFWJ8Ai2oim6ZbQyztePhJGZ6N/++pEA1tZyYElhV2hl0GsCxrQbgAcY3aqVR6z1/4fYdmM S5Fyz+aJ7OLDmvsGbIMGbMC9gUYJ9llI83iFq2cshut+8wIiStoq8E2GGTIVUO90h2MK4P5ijUL zOFQ34Ncpiry2J4NXwd+OVNjdLAw5TNZi5+o3P9LAjDQcy1lErk1ks0Gu+6kBsfFxBZlfpZdAMp WjOxQG6OobLR+VVagtg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_07,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609220045 On 9/22/2026 11:17 AM, sashiko-bot@kernel.org wrote: > Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: > - [Medium] arm64: dts: shikra: missing arm,coresight-loses-context-with-cpu property > -- > > commit aab8605634d60b3bebc7a736fcec36f07d87f859 > Author: Jie Gan > > arm64: dts: qcom: shikra: Switch CPU ETMs to MMIO-based probing > > The etm0-etm3 nodes are declared with "arm,coresight-etm4x-sysreg" > but do not implement self-hosted system-register trace access on > this SoC. The CPU ETMs have a memory-mapped aperture, so switch each > node to the standard "arm,coresight-etm4x", "arm,primecell" compatible > with its MMIO reg range. > >> diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi >> index c1f06f692f664..62bacf749241f 100644 >> --- a/arch/arm64/boot/dts/qcom/shikra.dtsi >> +++ b/arch/arm64/boot/dts/qcom/shikra.dtsi > [ ... ] >> @@ -3218,6 +3150,24 @@ cti@9020000 { >> label = "cti_apss_pe0"; >> }; >> >> + etm@9040000 { >> + compatible = "arm,coresight-etm4x", "arm,primecell"; > > [Severity: Medium]> Will this omission cause ETM tracing to silently stop functioning during CPU > deep idle? > > By switching to MMIO without adding the arm,coresight-loses-context-with-cpu > property, the coresight driver will skip allocating the save state. > > drivers/hwtracing/coresight/coresight-etm4x-core.c:etm4_add_coresight_dev() { > ... > else if (pm_save_enable == PARAM_PM_SAVE_FIRMWARE) > pm_save = coresight_loses_context_with_cpu(dev); > ... > } Currently, we are not enabling the CPU SAVE/RESTORE in HLOS driver on QCOM platforms. Thanks, Jie > > Should the arm,coresight-loses-context-with-cpu property be added to these > new MMIO etm nodes? >