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From: Suman Anna <s-anna@ti.com>
To: Crystal Guo <crystal.guo@mediatek.com>, Rob Herring <robh@kernel.org>
Cc: "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	srv_heupstream <srv_heupstream@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Seiya Wang (王迺君)" <seiya.wang@mediatek.com>,
	"Stanley Chu (朱原陞)" <stanley.chu@mediatek.com>,
	"Yingjoe Chen (陳英洲)" <Yingjoe.Chen@mediatek.com>,
	"Fan Chen (陳凡)" <fan.chen@mediatek.com>,
	"Yong Liang (梁勇)" <Yong.Liang@mediatek.com>
Subject: Re: [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to compatible
Date: Wed, 2 Sep 2020 18:25:58 -0500	[thread overview]
Message-ID: <6c292056-1cb1-bc6c-0422-46e047dcf08f@ti.com> (raw)
In-Reply-To: <1598440183.30048.14.camel@mhfsdcap03>

Hi Rob,

On 8/26/20 6:09 AM, Crystal Guo wrote:
> On Wed, 2020-08-26 at 03:02 +0800, Rob Herring wrote:
>> On Mon, Aug 17, 2020 at 11:03:22AM +0800, Crystal Guo wrote:
>>> The TI syscon reset controller provides a common reset management,
>>> and is suitable for MTK SoCs. Add compatible 'mediatek,infra-reset',
>>> which denotes to use ti reset-controller driver directly.
>>>
>>> Signed-off-by: Crystal Guo <crystal.guo@mediatek.com>
>>> ---
>>>  Documentation/devicetree/bindings/reset/ti-syscon-reset.txt | 1 +
>>>  1 file changed, 1 insertion(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
>>> index ab041032339b..5a0e9365b51b 100644
>>> --- a/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
>>> +++ b/Documentation/devicetree/bindings/reset/ti-syscon-reset.txt
>>> @@ -25,6 +25,7 @@ Required properties:
>>>  			    "ti,k2l-pscrst"
>>>  			    "ti,k2hk-pscrst"
>>>  			    "ti,syscon-reset"
>>> +			    "mediatek,infra-reset", "ti,syscon-reset"
>>
>> You need your own binding doc. If you can use the same driver then fine, 
>> but that's a separate issue. There's also reset-simple driver if you 
>> have just array of 32-bit registers with a bit per reset.
>>
>> Don't repeat 'ti,reset-bits' either.
> 
> Do you mean I should add a Mediatek reset binding doc, although Mediatek
> reuse the TI reset controller directly?

Hmm, how do you envision not repeating the same bits in a separate binding?
Does it help if I convert this to YAML first without a ti, prefix in the file name?

The usage philosophy definitely was to use a <soc-compatible> followed by the
<generic-compatible>. This is how all of our reset nodes were added as well.

Looks like Andrew may have misinterpreted your comment [1] during the original
binding and changed "syscon-reset" to "ti,syscon-reset" in the final version [2].

regards
Suman

[1] https://lore.kernel.org/patchwork/comment/876688/
[2] https://lore.kernel.org/patchwork/patch/693172/

> 
> Best Regards
> Crystal
>>
>>>   - #reset-cells		: Should be 1. Please see the reset consumer node below
>>>  			  for usage details
>>>   - ti,reset-bits	: Contains the reset control register information
>>> -- 
>>> 2.18.0
> 


  reply	other threads:[~2020-09-02 23:26 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-17  3:03 [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo
2020-08-17  3:03 ` [v4,1/4] dt-binding: reset-controller: ti: add reset-duration-us property Crystal Guo
2020-08-25 17:42   ` Rob Herring
2020-08-26 11:09     ` Crystal Guo
2020-08-17  3:03 ` [v4,2/4] dt-binding: reset-controller: ti: add 'mediatek,infra-reset' to compatible Crystal Guo
2020-08-25 19:02   ` Rob Herring
2020-08-26 11:09     ` Crystal Guo
2020-09-02 23:25       ` Suman Anna [this message]
2020-09-08 18:49         ` Rob Herring
2020-09-09 15:10           ` Suman Anna
2020-09-09 18:20             ` Rob Herring
2020-08-17  3:03 ` [v4,3/4] reset-controller: ti: introduce a new reset handler Crystal Guo
2020-09-02 23:40   ` Suman Anna
2020-09-09  2:57     ` Crystal Guo
2020-09-09 15:39       ` Suman Anna
2020-09-11  2:42         ` Crystal Guo
2020-09-11  2:52           ` Suman Anna
2020-09-11  6:07             ` Crystal Guo
2020-09-11 14:26               ` Philipp Zabel
2020-09-11 14:44                 ` Suman Anna
2020-09-14 14:00                   ` Crystal Guo
2020-09-29 13:54                     ` Crystal Guo
2020-08-17  3:03 ` [v4,4/4] arm64: dts: mt8192: add infracfg_rst node Crystal Guo
2020-09-02 23:29   ` Suman Anna
2020-09-08 13:26     ` Crystal Guo
2020-09-08 15:51       ` Suman Anna
     [not found] ` <5065a23627a34212aa62df646dbf00ee@mtkmbs05n1.mediatek.inc>
2020-09-02  3:03   ` [v4,0/4] introduce TI reset controller for MT8192 SoC Crystal Guo

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