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[83.9.31.20]) by smtp.gmail.com with ESMTPSA id ce4-20020a170906b24400b0078d3f96d293sm10423836ejb.30.2023.02.01.10.51.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 01 Feb 2023 10:51:33 -0800 (PST) Message-ID: <6c4cf46d-e4cf-dc9c-193a-e5dd77723b9f@linaro.org> Date: Wed, 1 Feb 2023 19:51:31 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.7.0 Subject: Re: [PATCH v4 2/2] arm64: dts: qcom: sdm670: add opps for peripherals Content-Language: en-US To: Richard Acayan , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Cc: Odelu Kukatla , Luca Weiss References: <20230201010020.84586-1-mailingradian@gmail.com> <20230201010020.84586-3-mailingradian@gmail.com> From: Konrad Dybcio In-Reply-To: <20230201010020.84586-3-mailingradian@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 1.02.2023 02:00, Richard Acayan wrote: > The interconnects are now in place. Add Operating Performance Points for > them to allow the kernel to properly manage them. You're really mostly adding interconnect paths in this patch. > > Signed-off-by: Richard Acayan > --- For the contents though: Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sdm670.dtsi | 109 +++++++++++++++++++++++++++ > 1 file changed, 109 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi > index 02f14692dd9d..c5f839dd1c6e 100644 > --- a/arch/arm64/boot/dts/qcom/sdm670.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -430,6 +431,10 @@ sdhc_1: mmc@7c4000 { > <&gcc GCC_SDCC1_ICE_CORE_CLK>, > <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>; > clock-names = "iface", "core", "xo", "ice", "bus"; > + interconnects = <&aggre1_noc MASTER_EMMC 0 &aggre1_noc SLAVE_A1NOC_SNOC 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_EMMC_CFG 0>; > + interconnect-names = "sdhc-ddr", "cpu-sdhc"; > + operating-points-v2 = <&sdhc1_opp_table>; > > iommus = <&apps_smmu 0x140 0xf>; > > @@ -442,6 +447,38 @@ sdhc_1: mmc@7c4000 { > non-removable; > > status = "disabled"; > + > + sdhc1_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-20000000 { > + opp-hz = /bits/ 64 <20000000>; > + required-opps = <&rpmhpd_opp_min_svs>; > + opp-peak-kBps = <80000 80000>; > + opp-avg-kBps = <52286 80000>; > + }; > + > + opp-50000000 { > + opp-hz = /bits/ 64 <50000000>; > + required-opps = <&rpmhpd_opp_low_svs>; > + opp-peak-kBps = <200000 100000>; > + opp-avg-kBps = <130718 100000>; > + }; > + > + opp-100000000 { > + opp-hz = /bits/ 64 <100000000>; > + required-opps = <&rpmhpd_opp_svs>; > + opp-peak-kBps = <200000 130000>; > + opp-avg-kBps = <130718 130000>; > + }; > + > + opp-384000000 { > + opp-hz = /bits/ 64 <384000000>; > + required-opps = <&rpmhpd_opp_nom>; > + opp-peak-kBps = <4096000 4096000>; > + opp-avg-kBps = <1338562 1338562>; > + }; > + }; > }; > > gpi_dma0: dma-controller@800000 { > @@ -477,6 +514,8 @@ qupv3_id_0: geniqup@8c0000 { > #address-cells = <2>; > #size-cells = <2>; > ranges; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>; > + interconnect-names = "qup-core"; > status = "disabled"; > > i2c0: i2c@880000 { > @@ -490,6 +529,10 @@ i2c0: i2c@880000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>, > <&gpi_dma0 1 0 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -507,6 +550,10 @@ i2c1: i2c@884000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>, > <&gpi_dma0 1 1 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -524,6 +571,10 @@ i2c2: i2c@888000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>, > <&gpi_dma0 1 2 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -541,6 +592,10 @@ i2c3: i2c@88c000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>, > <&gpi_dma0 1 3 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -558,6 +613,10 @@ i2c4: i2c@890000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>, > <&gpi_dma0 1 4 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -575,6 +634,10 @@ i2c5: i2c@894000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>, > <&gpi_dma0 1 5 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -592,6 +655,10 @@ i2c6: i2c@898000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>, > <&gpi_dma0 1 6 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -609,6 +676,10 @@ i2c7: i2c@89c000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre1_noc MASTER_BLSP_1 0 &config_noc SLAVE_BLSP_1 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_1 0>, > + <&aggre1_noc MASTER_BLSP_1 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>, > <&gpi_dma0 1 7 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -649,6 +720,8 @@ qupv3_id_1: geniqup@ac0000 { > #address-cells = <2>; > #size-cells = <2>; > ranges; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>; > + interconnect-names = "qup-core"; > status = "disabled"; > > i2c8: i2c@a80000 { > @@ -662,6 +735,10 @@ i2c8: i2c@a80000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>, > <&gpi_dma1 1 0 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -679,6 +756,10 @@ i2c9: i2c@a84000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>, > <&gpi_dma1 1 1 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -696,6 +777,10 @@ i2c10: i2c@a88000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>, > <&gpi_dma1 1 2 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -713,6 +798,10 @@ i2c11: i2c@a8c000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>, > <&gpi_dma1 1 3 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -730,6 +819,10 @@ i2c12: i2c@a90000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>, > <&gpi_dma1 1 4 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -747,6 +840,10 @@ i2c13: i2c@a94000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>, > <&gpi_dma1 1 5 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -764,6 +861,10 @@ i2c14: i2c@a98000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>, > <&gpi_dma1 1 6 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -781,6 +882,10 @@ i2c15: i2c@a9c000 { > #address-cells = <1>; > #size-cells = <0>; > power-domains = <&rpmhpd SDM670_CX>; > + interconnects = <&aggre2_noc MASTER_BLSP_2 0 &config_noc SLAVE_BLSP_2 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_BLSP_2 0>, > + <&aggre2_noc MASTER_BLSP_2 0 &mem_noc SLAVE_EBI_CH0 0>; > + interconnect-names = "qup-core", "qup-config", "qup-memory"; > dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>, > <&gpi_dma1 1 7 QCOM_GPI_I2C>; > dma-names = "tx", "rx"; > @@ -1028,6 +1133,10 @@ usb_1: usb@a6f8800 { > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > + interconnects = <&aggre2_noc MASTER_USB3 0 &mem_noc SLAVE_EBI_CH0 0>, > + <&gladiator_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_USB3 0>; > + interconnect-names = "usb-ddr", "apps-usb"; > + > status = "disabled"; > > usb_1_dwc3: usb@a600000 {