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From: Mason Huo <mason.huo@starfivetech.com>
To: Conor Dooley <conor@kernel.org>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	"Rob Herring" <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Shengyu Qu <wiagn233@outlook.com>, <linux-pm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v2 3/3] riscv: dts: starfive: Add cpu scaling for JH7110 SoC
Date: Thu, 20 Apr 2023 15:10:45 +0800	[thread overview]
Message-ID: <6ce407ab-0d2a-323f-61df-44b2ed8eb0ca@starfivetech.com> (raw)
In-Reply-To: <20230418-talcum-unthread-618a5bd2758a@spud>



On 2023/4/19 1:28, Conor Dooley wrote:
> Hey Mason,
> 
> Just one minor comment in passing..
> 
> On Mon, Apr 17, 2023 at 02:39:42PM +0800, Mason Huo wrote:
>> Add the operating-points-v2 to support cpu scaling on StarFive JH7110 SoC.
>> It supports up to 4 cpu frequency loads.
>> 
>> Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
>> ---
>>  .../jh7110-starfive-visionfive-2.dtsi         | 17 ++++++++++
>>  arch/riscv/boot/dts/starfive/jh7110.dtsi      | 33 +++++++++++++++++++
>>  2 files changed, 50 insertions(+)
>> 
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> index cca1c8040801..b25e6d68ce53 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
>> @@ -227,3 +227,20 @@ &uart0 {
>>  	pinctrl-0 = <&uart0_pins>;
>>  	status = "okay";
>>  };
>> +
>> +&U74_1 {
>> +	cpu-supply = <&vdd_cpu>;
>> +};
>> +
>> +&U74_2 {
>> +	cpu-supply = <&vdd_cpu>;
>> +};
>> +
>> +&U74_3 {
>> +	cpu-supply = <&vdd_cpu>;
>> +};
>> +
>> +&U74_4 {
>> +	cpu-supply = <&vdd_cpu>;
>> +};
>> +
> 
> Applying: riscv: dts: starfive: Add cpu scaling for JH7110 SoC
> /stuff/linux/.git/rebase-apply/patch:30: new blank line at EOF.
> +
> warning: 1 line adds whitespace errors.
> 
> Cheers,
> Conor.
> 
Hi Conor,

Will fix it soon.

Thanks
Mason

      reply	other threads:[~2023-04-20  7:10 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-17  6:39 [PATCH v2 0/3] Add JH7110 cpufreq support Mason Huo
2023-04-17  6:39 ` [PATCH v2 1/3] riscv: dts: starfive: Enable axp15060 pmic for cpufreq Mason Huo
2023-04-17  6:39 ` [PATCH v2 2/3] cpufreq: dt-platdev: Add JH7110 SOC to the allowlist Mason Huo
2023-04-17  6:39 ` [PATCH v2 3/3] riscv: dts: starfive: Add cpu scaling for JH7110 SoC Mason Huo
2023-04-18 17:28   ` Conor Dooley
2023-04-20  7:10     ` Mason Huo [this message]

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