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charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=W6M4VQWk c=1 sm=1 tr=0 ts=67eec7e4 cx=c_pps a=JYp8KDb2vCoCEuGobkYCKw==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=XR8D0OoHHMoA:10 a=gEfo2CItAAAA:8 a=COk6AnOGAAAA:8 a=DNBpd1jkDncxHhzUvaYA:9 a=QEXdDO2ut3YA:10 a=sptkURWiP4Gy88Gu7hUp:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: 2D00ETk_bL3bB3qEgsp3IfQhsQpAeV79 X-Proofpoint-GUID: 2D00ETk_bL3bB3qEgsp3IfQhsQpAeV79 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-03_07,2025-04-03_03,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 adultscore=0 mlxlogscore=999 mlxscore=0 bulkscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 phishscore=0 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504030089 On 4/3/2025 7:16 PM, Mukesh Kumar Savaliya wrote: > Add device tree bindings for the Qualcomm I3C controller. This includes > the necessary documentation and properties required to describe the > hardware in the device tree. > > Signed-off-by: Mukesh Kumar Savaliya > --- > .../bindings/i3c/qcom,geni-i3c.yaml | 63 +++++++++++++++++++ > 1 file changed, 63 insertions(+) > create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.yaml > > diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.yaml b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.yaml > new file mode 100644 > index 000000000000..25f0d92204d9 > --- /dev/null > +++ b/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.yaml > @@ -0,0 +1,63 @@ > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/i3c/qcom,geni-i3c.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Geni based QUP I3C Controller > + > +maintainers: > + - Mukesh Kumar Savaliya > + > +description: > + I3C in master mode supports up to 12.5MHz, SDR mode data transfer in mixed > + bus mode (I2C and I3C target devices on same i3c bus). It also supports > + hotjoin, IBI mechanism. > + > + I3C Controller nodes must be child of GENI based Qualcomm Universal > + Peripharal. Please refer GENI based QUP wrapper controller node bindings > + described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml. > + > +allOf: > + - $ref: i3c.yaml# > + > +properties: > + compatible: > + - qcom,geni-i3c To be replaced by "const: qcom,geni-i3c", left this in local. > + > + reg: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + clock-names: > + const: se > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - interrupts > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + #include > + > + i3c@884000 { > + compatible = "qcom,geni-i3c"; > + reg = <0x00884000 0x4000>; > + clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; > + clock-names = "se"; > + interrupts = ; > + #address-cells = <3>; > + #size-cells = <0>; > + }; > +...