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Fri, 07 Nov 2025 03:21:49 -0800 (PST) X-Google-Smtp-Source: AGHT+IGMxJiPYMbXhmyW6GmkAmacMyTL5nlXaV1J2L1emWF3kyohSqrskKsInlGn9YLKNL5Se+Juzg== X-Received: by 2002:a05:6512:6c9:b0:594:2e9b:f291 with SMTP id 2adb3069b0e04-59456b4d9c7mr941835e87.9.1762514508612; Fri, 07 Nov 2025 03:21:48 -0800 (PST) Received: from [172.25.183.149] ([93.94.208.154]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5944a019d2asm1378089e87.26.2025.11.07.03.21.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Nov 2025 03:21:47 -0800 (PST) Message-ID: <6d0fb6aa-6d88-4069-a5e5-9e910523888e@canonical.com> Date: Fri, 7 Nov 2025 12:21:46 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/8] Add support for StarFive VisionFive 2 Lite board To: E Shattow Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Hal Feng , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Palmer Dabbelt , Paul Walmsley , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Emil Renner Berthing References: <20251107095530.114775-1-hal.feng@starfivetech.com> Content-Language: en-US From: Heinrich Schuchardt In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 11/7/25 12:11, E Shattow wrote: > > > On 11/7/25 01:55, Hal Feng wrote: >> VisionFive 2 Lite is a mini SBC based on the StarFive JH7110S industrial >> SoC which can run at -40~85 degrees centigrade and up to 1.25GHz. >> >> Board features: >> - JH7110S SoC >> - 4/8 GiB LPDDR4 DRAM >> - AXP15060 PMIC >> - 40 pin GPIO header >> - 1x USB 3.0 host port >> - 3x USB 2.0 host port >> - 1x M.2 M-Key (size: 2242) >> - 1x MicroSD slot (optional non-removable 64GiB eMMC) >> - 1x QSPI Flash >> - 1x I2C EEPROM >> - 1x 1Gbps Ethernet port >> - SDIO-based Wi-Fi & UART-based Bluetooth >> - 1x HDMI port >> - 1x 2-lane DSI >> - 1x 2-lane CSI >> >> VisionFive 2 Lite schematics: https://doc-en.rvspace.org/VisionFive2Lite/PDF/VF2_LITE_V1.10_TF_20250818_SCH.pdf >> VisionFive 2 Lite Quick Start Guide: https://doc-en.rvspace.org/VisionFive2Lite/VisionFive2LiteQSG/index.html >> More documents: https://doc-en.rvspace.org/Doc_Center/visionfive_2_lite.html >> >> Changes since v1: >> - Drop patch 1 because it is applied. >> - Rename jh7110.dtsi to jh711x.dtsi. >> - Move the content of jh7110-common.dtsi to the new file >> jh711x-common.dtsi and move opp table to jh7110-common.dtsi. >> patch 4: >> - Move the uncommon nodes to jh7110-common.dtsi instead of board dts. >> patch 5: >> - Add jh7110s-common.dtsi and include it in jh7110s-starfive-visionfive-2-lite.dtsi. >> >> Changes since RFC: >> - Add jh7110s compatible to the generic cpufreq driver. >> - Fix the dtbs_check error by adding the missing "enable-gpios" property >> in jh7110 pcie dt-bindings. >> - Rebase on the latest mainline. >> - Add VisionFive 2 Lite eMMC board device tree and add a common board dtsi >> for VisionFive 2 Lite variants. >> - Add usb switch pin configuration (GPIO62). >> - Improve the commit messages. >> >> History: >> v1: https://lore.kernel.org/all/20251016080054.12484-1-hal.feng@starfivetech.com/ >> RFC: https://lore.kernel.org/all/20250821100930.71404-1-hal.feng@starfivetech.com/ >> >> Hal Feng (8): >> dt-bindings: PCI: starfive,jh7110-pcie: Add enable-gpios property >> dt-bindings: riscv: Add StarFive JH7110S SoC and VisionFive 2 Lite >> board >> riscv: dts: starfive: Rename jh7110.dtsi to jh711x.dtsi >> riscv: dts: starfive: Split jh7110-common.dtsi and move opp table to >> it >> riscv: dts: starfive: jh711x-common: Move out some nodes to jh7110 >> common dtsi >> riscv: dts: starfive: Add common board dtsi for JH7110s and VisionFive >> 2 Lite variants >> riscv: dts: starfive: Add VisionFive 2 Lite board device tree >> riscv: dts: starfive: Add VisionFive 2 Lite eMMC board device tree >> >> .../bindings/pci/starfive,jh7110-pcie.yaml | 4 + >> .../devicetree/bindings/riscv/starfive.yaml | 6 + >> arch/riscv/boot/dts/starfive/Makefile | 3 + >> .../boot/dts/starfive/jh7110-common.dtsi | 653 +---------------- >> .../boot/dts/starfive/jh7110s-common.dtsi | 27 + >> ...h7110s-starfive-visionfive-2-lite-emmc.dts | 22 + >> .../jh7110s-starfive-visionfive-2-lite.dts | 20 + >> .../jh7110s-starfive-visionfive-2-lite.dtsi | 126 ++++ >> .../boot/dts/starfive/jh711x-common.dtsi | 656 ++++++++++++++++++ >> .../dts/starfive/{jh7110.dtsi => jh711x.dtsi} | 16 - >> 10 files changed, 879 insertions(+), 654 deletions(-) >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-common.dtsi >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite-emmc.dts >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite.dts >> create mode 100644 arch/riscv/boot/dts/starfive/jh7110s-starfive-visionfive-2-lite.dtsi >> create mode 100644 arch/riscv/boot/dts/starfive/jh711x-common.dtsi >> rename arch/riscv/boot/dts/starfive/{jh7110.dtsi => jh711x.dtsi} (99%) >> >> >> base-commit: df5d79720b152e7ff058f11ed7e88d5b5c8d2a0c > > Small nit that "lite-emmc" is confusing together. In patches to U-Boot > dev mailing list the EEPROM product id is demonstrated to be with "SL" > suffix when compared to VisionFive 2 (JH7110) so I suggest avoid > confusion in upstream and use for VisionFive 2 Lite (JH7110S) these > compatible names: > > starfive,visionfive-2sl-lite > starfive,visionfive-2sl-emmc > > Also filenames: > > jh7110s-starfive-visionfive-2sl-lite.dts > jh7110s-starfive-visionfive-2sl.dtsi > jh7110s-starfive-visionfive-2sl-emmc.dts > > What do you think? > This is a serial number for the Lite board: VF7110SL-2310-D002E000-xxxxxxxx Here E000 encodes that we have no eMMC. The S is part of 7110S which we already have in 'jh7110s'. And the L is already decoded as 'lite' in this patch series. Duplicating this information as 'sl' as you suggested provides no benefit. Let's just stick with Hal's suggestion. Best regards Heinrich