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([2001:818:ea8e:7f00:2575:914:eedd:620e]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4409d2a13bdsm180114875e9.9.2025.04.29.01.28.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Apr 2025 01:28:12 -0700 (PDT) Message-ID: <6db027ae67a46cfff906932e5d306fa0d9edf766.camel@gmail.com> Subject: Re: [PATCH v3 07/11] iio: adc: adi-axi-adc: add sync enable/disable From: Nuno =?ISO-8859-1?Q?S=E1?= To: Antoniu Miclaus , jic23@kernel.org, robh@kernel.org, conor+dt@kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Tue, 29 Apr 2025 09:28:16 +0100 In-Reply-To: <20250425112538.59792-8-antoniu.miclaus@analog.com> References: <20250425112538.59792-1-antoniu.miclaus@analog.com> <20250425112538.59792-8-antoniu.miclaus@analog.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.1 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Fri, 2025-04-25 at 14:25 +0300, Antoniu Miclaus wrote: > Add support for enabling/disabling the sync process used for data > capture alignment. >=20 > Signed-off-by: Antoniu Miclaus > --- Some comments from me... I'm also still not convinced this API can't be mer= ged with the sync get. More comments on the frontend driver patch. > changes in v3: > =C2=A0- update the function to match the new backend interface. > =C2=A0drivers/iio/adc/adi-axi-adc.c | 21 +++++++++++++++++++++ > =C2=A01 file changed, 21 insertions(+) >=20 > diff --git a/drivers/iio/adc/adi-axi-adc.c b/drivers/iio/adc/adi-axi-adc.= c > index 2a3a6c3f5e59..9947be059f98 100644 > --- a/drivers/iio/adc/adi-axi-adc.c > +++ b/drivers/iio/adc/adi-axi-adc.c > @@ -44,6 +44,7 @@ > =C2=A0#define=C2=A0=C2=A0 ADI_AXI_ADC_REG_CONFIG_CMOS_OR_LVDS_N BIT(7) > =C2=A0 > =C2=A0#define ADI_AXI_ADC_REG_CTRL 0x0044 > +#define=C2=A0=C2=A0=C2=A0 AXI_AD408X_CTRL_SYNC_MSK BIT(3) > =C2=A0#define=C2=A0=C2=A0=C2=A0 ADI_AXI_ADC_CTRL_DDR_EDGESEL_MASK BIT(1) > =C2=A0 > =C2=A0#define ADI_AXI_ADC_REG_CNTRL_3 0x004c > @@ -416,6 +417,22 @@ static int axi_adc_ad408x_filter_type_set(struct > iio_backend *back, > =C2=A0 AXI_AD408X_CNTRL_3_FILTER_EN_MSK); > =C2=A0} > =C2=A0 > +static int axi_adc_sync_enable(struct iio_backend *back) > +{ > + struct adi_axi_adc_state *st =3D iio_backend_get_priv(back); > + > + return regmap_set_bits(st->regmap, ADI_AXI_ADC_REG_CTRL, > + =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 AXI_AD408X_CTRL_SYNC_MSK); > +} > + > +static int axi_adc_sync_disable(struct iio_backend *back) > +{ > + struct adi_axi_adc_state *st =3D iio_backend_get_priv(back); > + > + return regmap_clear_bits(st->regmap, ADI_AXI_ADC_REG_CTRL, > + AXI_AD408X_CTRL_SYNC_MSK); > +} > + > =C2=A0static struct iio_buffer *axi_adc_request_buffer(struct iio_backend= *back, > =C2=A0 struct iio_dev *indio_dev) > =C2=A0{ > @@ -559,6 +576,8 @@ static const struct iio_backend_ops adi_axi_adc_ops = =3D { > =C2=A0 .request_buffer =3D axi_adc_request_buffer, > =C2=A0 .free_buffer =3D axi_adc_free_buffer, > =C2=A0 .data_sample_trigger =3D axi_adc_data_sample_trigger, > + .data_alignment_enable =3D axi_adc_sync_enable, > + .data_alignment_disable =3D axi_adc_sync_disable, Same comment as for the number of lanes op... > =C2=A0 .iodelay_set =3D axi_adc_iodelays_set, > =C2=A0 .test_pattern_set =3D axi_adc_test_pattern_set, > =C2=A0 .chan_status =3D axi_adc_chan_status, > @@ -605,6 +624,8 @@ static const struct iio_backend_ops adi_ad408x_ops = =3D { > =C2=A0 .free_buffer =3D axi_adc_free_buffer, > =C2=A0 .data_sample_trigger =3D axi_adc_data_sample_trigger, > =C2=A0 .filter_type_set =3D axi_adc_ad408x_filter_type_set, > + .data_alignment_enable =3D axi_adc_sync_enable, > + .data_alignment_disable =3D axi_adc_sync_disable, Are we using the disable op at all? > =C2=A0 .debugfs_reg_access =3D iio_backend_debugfs_ptr(axi_adc_reg_access= ), > =C2=A0 .debugfs_print_chan_status =3D > iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status), > =C2=A0};