From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4E80F13BC0E; Sat, 22 Feb 2025 11:50:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740225020; cv=none; b=SKyvMiZInQGTd8PjqKgkbJFcesvXmuiCht+/9hJ6jhU7Z8ZHpEbAs06lTkdvhKs2q09ycH3YZokaUjFiRIRIWfO0tapRCnsQnxZ8h2RSc+3Ar3ZGgzNyBpZ0wjQENZsEB1IhPZXw9MYyxtCtPxqc/r34B+wPWAD9cLOiGKqIGco= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1740225020; c=relaxed/simple; bh=WHtr1zZ9a93GA1KijUCd5YYQ9Yepb+ZGhVADmwPbocI=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=gMYDF8/RDYJ/2eqDuA0/d9hqs6XXBO6JHAxfZA2VrHcDz+V2TA1Oa+nXktuW+9ctZdEPOB1/0AQZCwiaTzf+23OPGLaMMp8T06tKOamQhX3BlHRMbYbQ7QDQgwkBlFxPcSSNU2Lt99MgAkbW7acu5++KIGBNSPt/UNBWeIzE0as= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=SXBs45JI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="SXBs45JI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 23507C4CED1; Sat, 22 Feb 2025 11:50:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1740225019; bh=WHtr1zZ9a93GA1KijUCd5YYQ9Yepb+ZGhVADmwPbocI=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=SXBs45JIAQyCjrBLXFrXylEYrGln2xUNPbeu/mD4vEJFXqrMqWTebBpkRako/hov1 KItQno/KnBo6RrMbMozSpT7L8sN+RpMWywtbc+REHb6CMl+1ysNTRHOiY5LEHX1RDS 00ntIoyFm3VgYjFqm8Vp04Y2jzPkthHwPrUWX0deZ0uIjFX8Dtjt4kqoMBYuIgKvtU xlEwAzxTCHrii9X/eBnZT/4Co2YKCF/9SUQY8pFG3Kqw9vyTtLp+KcMVNf82X5tFQj 4IUkYYaF415Uk7xN5xKitt1Wl2YhDcnm6nq3Wi7nldFfSYXkdhTlRgvesm8RlTFjWT zRRa2L4s4ssxQ== Message-ID: <6ea8ac17-42c8-46fa-b970-77ba89de66c4@kernel.org> Date: Sat, 22 Feb 2025 12:50:13 +0100 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/4] dt-bindings: soc: spacemit: Add spacemit,k1-syscon To: Haylen Chu , Alex Elder Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Haylen Chu , Yixun Lan , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Inochi Amaoto , Chen Wang , Jisheng Zhang , Meng Zhang , Guodong Xu References: <20250103215636.19967-2-heylenay@4d2.org> <20250103215636.19967-4-heylenay@4d2.org> <19e5129b-8423-4660-8e4f-8b898214d275@kernel.org> <2ab715bd-e26c-41bb-ac64-baa864d90414@kernel.org> <7c697e9a-d6d9-4672-9738-93ce3a71beb6@riscstar.com> <4f7bf109-bf18-42be-971c-5d5edd9595b5@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 22/02/2025 11:48, Haylen Chu wrote: > On Sat, Feb 22, 2025 at 10:59:09AM +0100, Krzysztof Kozlowski wrote: >> On 22/02/2025 00:40, Alex Elder wrote: >>> I have a general proposal on how to represent this, but I'd >>> like to know whether it makes sense. It might be what Krzysztof >>> is suggesting, but in any case, I hope this representation would >>> work, because it could simplify the code, and compartmentalizes >>> things. >>> >>> Part of what motivates this is that I've been looking at the >>> downstream reset code this week. It contains a large number of >>> register offset definitions identical to what's used for the >>> clock driver. The reset driver uses exactly the same registers >>> as the clock driver does. Downstream they are separate drivers, >>> but the clock driver exports a shared spinlock for both drivers >>> to use. >>> >>> These really need to be incorporated into the same driver for >>> upstream. >> >> Why? First, it is not related to the topic here at all. You can design >> drivers as you wish and still nothing to do with discussion about binding. >> Second, different subsystems justify different drivers and Linux handles >> this well already. No need for custom spinlock - regmap already does it. >> >> >>> >>> The clock code defines four distinct "units" (a term I'll use >>> from here on; there might be a better name): >>> MPMU Main Power Management Unit >>> APMU Application Power Management Unit >>> APBC APB Clock >>> APBS APB Spare >>> >>> The reset code defines some of those, but doesn't use APBS. >>> It also defines three more: >>> APBC2 Another APB Clock >>> RCPU Real-time CPU? >>> RCPU2 Another Real-time CPU >>> >>> Each of these "units" has a distinct I/O memory region that >>> contains registers that manage the clocks and reset signals. >> >> So there are children - mpmu, apmu, apbclock, apbspare, apbclock2, rcpu >> 1+2? But previous statements were saying these are intermixed? >> >> " I'll make APMU/MPMU act as a whole device" > > My reply seems somehow misleading. The statement means I will merge the > children with the syscon into one devicetree node, which applies for > both APMU and MPMU. I wasn't going to say that APMU and MPMU are > intermixed. > > As Alex said, all these units have their own distinct and separate MMIO > regions. > >>> >>> I suggest a single "k1-clocks" device be created, which has >> >> For four devices? Or for one device? > > By Alex's example, I think he means a device node taking all these > distinct MMIO regions as resource. You still do not answer about the hardware: how many devices is there? > > clock { > compatible = "spacemit,k1-clocks"; > > reg = <0x0 0xc0880000 0x0 0x2050>, > <0x0 0xc0888000 0x0 0x30>, > <0x0 0xd4015000 0x0 0x1000>, > <0x0 0xd4050000 0x0 0x209c>, > <0x0 0xd4090000 0x0 0x1000>, > <0x0 0xd4282800 0x0 0x400>, > <0x0 0xf0610000 0x0 0x20>; > reg-names = "rcpu", > "rcpu2", > "apbc", > "mpmu", > "apbs", > "apmu", > "apbc2"; > > /* ... */ > }; > >> No, it's again going to wrong direction. I already said: >> >> "You need to define what is the device here. Don't create fake nodes ust >> for your drivers. If registers are interleaved and manual says "this is >> block APMU/MPMU" then you have one device, so one node with 'reg'." >> >> So what is the device here? Can you people actually answer? >> > > I'm not sure about the apbc2, rcpu and rcpu2 regions; they aren't > related to the thread, either. For APBC, MPMU, APBS and APMU, I'm pretty > sure they're standalone blocks with distinct and separate MMIO regions, > this could be confirmed by the address mapping[1]. They were brought here to discuss for some reason. Long discussions, long emails, unrelated topics like hardware or different devices - all this is not making it easier for me to understand. Best regards, Krzysztof