Devicetree
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From: Neha Malcom Francis <n-francis@ti.com>
To: "Kumar, Udit" <u-kumar1@ti.com>, <robh@kernel.org>,
	<conor+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<vigneshr@ti.com>, <nm@ti.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<kristo@kernel.org>
Subject: Re: [PATCH 3/4] arm64: dts: ti: k3-j721e-main: Add the MAIN domain watchdog instances
Date: Wed, 10 Apr 2024 11:20:07 +0530	[thread overview]
Message-ID: <6eae9461-53aa-4d37-9829-3f8176c328bb@ti.com> (raw)
In-Reply-To: <a329fc6b-561c-4300-8778-c90ca97b70f3@ti.com>

Hi Udit,

On 10/04/24 11:06, Kumar, Udit wrote:
> Hi Neha
> 
> On 3/26/2024 5:57 PM, Neha Malcom Francis wrote:
>> There are 10 watchdog instances in the MAIN domain:
>>     * one each for the 2 A72 cores
>>     * one for the GPU core
>>     * one for the C7x core
>>     * one each for the 2 C66x cores
>>     * one each for the 4 R5F cores
>>
>> Currently, the devicetree only describes watchdog instances for the A72
>> cores and enables them. Describe the remaining but reserve them as they
>> will be used by their respective firmware.
>>
>> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 93 +++++++++++++++++++++++
>>   1 file changed, 93 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi 
>> b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> index c7eafbc862f9..d8930b8ea8ec 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
>> @@ -2157,6 +2157,99 @@ watchdog1: watchdog@2210000 {
>>           assigned-clock-parents = <&k3_clks 253 5>;
>>       };
> 
> Looking at TRM, SPRUIJ7*3–December 2018–Revised March 2019,
> 
> Table 12-22646. RTI Instances, says There is gap in numbering
> 
> RTI0, RTI1, RTI15 and so on
> 
> IMO, labels for watchdog should be as per TRM.
> 
> eg watchdog2 to watchdog15, But I don't have strong opinion on either .
> 
> Let maintainer suggest on this
> 

Yes, perhaps sticking to the TRM numbering with gaps will improve readability. I 
can change that in next version if no objections.
> 
> 
>> +    /*
>> +     * The following RTI instances are coupled with MCU R5Fs, c7x and
>> +     * GPU so keeping them reserved as these will be used by their
>> +     * respective firmware
>> +     */
>> +    watchdog2: watchdog@22f0000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x22f0000 0x00 0x100>;
>> +        clocks = <&k3_clks 257 1>;
>> +        power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 257 1>;
>> +        assigned-clock-parents = <&k3_clks 257 5>;
>> +        /* reserved for GPU */
>> +        status = "reserved";
>> +    };
> 
> Please help me to understand, where from you got it for GPU,
> 
> May be I am looking at wrong data, Again above TRM
> 
> Table 12-22645. RTI Hardware Requests. RTI-15 says esm0
> 

The table you are looking at mentions where the interrupt from the watchdog is 
routed to.

In the TRM, in sub-section 12.10.2 Windowed Watchdog Timer (WWDT) > 12.19.2.1 
RTI Overview; it is mentioned that RTI15 is dedicated to the GPU.


>> +
>> +    watchdog3: watchdog@2300000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x2300000 0x00 0x100>;
>> +        clocks = <&k3_clks 256 1>;
>> +        power-domains = <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 256 1>;
>> +        assigned-clock-parents = <&k3_clks 256 5>;
>> +        /* reserved for C7X */
>> +        status = "reserved";
> 
> This I see in above table for Compute Cluster
> 
> 
>> +    };
>> +
>> +    watchdog4: watchdog@2380000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x2380000 0x00 0x100>;
>> +        clocks = <&k3_clks 254 1>;
>> +        power-domains = <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 254 1>;
>> +        assigned-clock-parents = <&k3_clks 254 5>;
>> +        /* reserved for C66X_0 */
>> +        status = "reserved";
>> +    };
>> +
>> +    watchdog5: watchdog@2390000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x2390000 0x00 0x100>;
>> +        clocks = <&k3_clks 255 1>;
>> +        power-domains = <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 255 1>;
>> +        assigned-clock-parents = <&k3_clks 255 5>;
>> +        /* reserved for C66X_1 */
>> +        status = "reserved";
>> +    };
>> +
>> +    watchdog6: watchdog@23c0000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x23c0000 0x00 0x100>;
>> +        clocks = <&k3_clks 258 1>;
>> +        power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 258 1>;
>> +        assigned-clock-parents = <&k3_clks 258 5>;
>> +        /* reserved for MAIN_R5F0_0 */
> 
> TRM says, this covers both MAIN_R5F0_0 and MAIN_R5F0_1.
> 
> Suggest , if split is done at fw level
> 
>> +        status = "reserved";
>> +    };
>> +
>> +    watchdog7: watchdog@23d0000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x23d0000 0x00 0x100>;
>> +        clocks = <&k3_clks 259 1>;
>> +        power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 259 1>;
>> +        assigned-clock-parents = <&k3_clks 259 5>;
>> +        /* reserved for MAIN_R5F0_1 */
>> +        status = "reserved";
> 
> TRM says, this covers both MAIN_R5F0_0 and MAIN_R5F0_1.
> 
> Suggest , if split is done at fw level

I didn't quite understand, these watchdogs are mentioned only for DTS 
completeness sake.
> 
>> +    };
>> +
>> +    watchdog8: watchdog@23e0000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x23e0000 0x00 0x100>;
>> +        clocks = <&k3_clks 260 1>;
>> +        power-domains = <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 260 1>;
>> +        assigned-clock-parents = <&k3_clks 260 5>;
>> +        /* reserved for MAIN_R5F1_0 */
>> +        status = "reserved";
>> +    };
> 
> 
> TRM says, this covers both MAIN_R5F1_0 and MAIN_R5F1_1.
> 
> Suggest , if split is done at fw level
> 
>> +
>> +    watchdog9: watchdog@23f0000 {
>> +        compatible = "ti,j7-rti-wdt";
>> +        reg = <0x00 0x23f0000 0x00 0x100>;
>> +        clocks = <&k3_clks 261 1>;
>> +        power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
>> +        assigned-clocks = <&k3_clks 261 1>;
>> +        assigned-clock-parents = <&k3_clks 261 5>;
>> +        /* reserved for MAIN_R5F1_1 */
> 
> TRM says, this covers both MAIN_R5F1_0 and MAIN_R5F1_1.
> 
> Suggest , if split is done at fw level
> 
>> +        status = "reserved";
>> +    };
>> +
>>       main_r5fss0: r5fss@5c00000 {
>>           compatible = "ti,j721e-r5fss";
>>           ti,cluster-mode = <1>;

-- 
Thanking You
Neha Malcom Francis

  reply	other threads:[~2024-04-10  5:50 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-26 12:27 [PATCH 0/4] arm64: dts: ti: k3-j7*: Add missing ESM and watchdog nodes Neha Malcom Francis
2024-03-26 12:27 ` [PATCH 1/4] arm64: dts: ti: k3-j721e-mcu: Add the WKUP ESM instance Neha Malcom Francis
2024-04-10  5:12   ` Kumar, Udit
2024-04-10  5:39     ` Neha Malcom Francis
2024-03-26 12:27 ` [PATCH 2/4] arm64: dts: ti: k3-j721e-mcu: Add the MCU domain watchdog instances Neha Malcom Francis
2024-04-10  5:45   ` Kumar, Udit
2024-04-12  4:23     ` Neha Malcom Francis
2024-03-26 12:27 ` [PATCH 3/4] arm64: dts: ti: k3-j721e-main: Add the MAIN " Neha Malcom Francis
2024-04-10  5:36   ` Kumar, Udit
2024-04-10  5:50     ` Neha Malcom Francis [this message]
2024-04-12  4:21     ` Neha Malcom Francis
2024-03-26 12:27 ` [PATCH 4/4] arm64: dts: ti: k3-j7200-main: " Neha Malcom Francis
2024-04-10  6:05   ` Kumar, Udit
2024-04-10  6:09     ` Neha Malcom Francis

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