* [PATCH 0/3] Add Support for RG-ARC Panel
@ 2023-12-08 15:48 Chris Morgan
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Chris Morgan @ 2023-12-08 15:48 UTC (permalink / raw)
To: devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
Add support for the Anbernic RG-ARC display panel as used in the
RG-ARC S and RG-ARC D handheld gaming devices from Anbernic.
Chris Morgan (3):
drm/panel: st7701: Fix AVCL calculation
dt-bindings: display: st7701: Add Anbernic RG-ARC panel
drm/panel: st7701: Add Anbernic RG-ARC Panel Support
.../display/panel/sitronix,st7701.yaml | 1 +
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 138 +++++++++++++++++-
2 files changed, 138 insertions(+), 1 deletion(-)
--
2.34.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation
2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
@ 2023-12-08 15:48 ` Chris Morgan
2023-12-11 8:29 ` neil.armstrong
2023-12-11 23:43 ` Linus Walleij
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
` (2 subsequent siblings)
3 siblings, 2 replies; 11+ messages in thread
From: Chris Morgan @ 2023-12-08 15:48 UTC (permalink / raw)
To: devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The AVCL register, according to the datasheet, comes in increments
of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
by 0x3). The current calculation is done by adding the defined
AVCL value in mV to -4400 and then dividing by 200 to get the register
value. Unfortunately if I subtract -4400 from -4400 I get -8800, which
divided by 200 gives me -44. If I instead subtract -4400 from -4400
I get 0, which divided by 200 gives me 0. Based on the datasheet this
is the expected register value.
Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing")
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
index 0459965e1b4f..036ac403ed21 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
@@ -288,7 +288,7 @@ static void st7701_init_sequence(struct st7701 *st7701)
FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVDD_MASK,
DIV_ROUND_CLOSEST(desc->avdd_mv - 6200, 200)) |
FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVCL_MASK,
- DIV_ROUND_CLOSEST(-4400 + desc->avcl_mv, 200)));
+ DIV_ROUND_CLOSEST(-4400 - desc->avcl_mv, 200)));
/* T2D = 0.2us * T2D[3:0] */
ST7701_DSI(st7701, DSI_CMD2_BK1_SPD1,
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel
2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
@ 2023-12-08 15:48 ` Chris Morgan
2023-12-09 8:13 ` Krzysztof Kozlowski
2023-12-09 23:38 ` Linus Walleij
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
2023-12-11 9:16 ` [PATCH 0/3] Add Support for RG-ARC Panel Neil Armstrong
3 siblings, 2 replies; 11+ messages in thread
From: Chris Morgan @ 2023-12-08 15:48 UTC (permalink / raw)
To: devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The RG-ARC panel is a panel specific to the Anbernic RG-ARC. It is 4
inches in size (diagonally) with a resolution of 480x640.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
.../devicetree/bindings/display/panel/sitronix,st7701.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml
index 4dc0cd4a6a77..b348f5bf0a98 100644
--- a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml
+++ b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml
@@ -27,6 +27,7 @@ properties:
compatible:
items:
- enum:
+ - anbernic,rg-arc-panel
- densitron,dmt028vghmcmi-1a
- elida,kd50t048a
- techstar,ts8550b
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support
2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
@ 2023-12-08 15:48 ` Chris Morgan
2023-12-11 8:28 ` neil.armstrong
2023-12-11 23:44 ` Linus Walleij
2023-12-11 9:16 ` [PATCH 0/3] Add Support for RG-ARC Panel Neil Armstrong
3 siblings, 2 replies; 11+ messages in thread
From: Chris Morgan @ 2023-12-08 15:48 UTC (permalink / raw)
To: devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
From: Chris Morgan <macromorgan@hotmail.com>
The Powkiddy RG-ARC is a series of 2 handheld devices, each with a 4
inch 480x640 display. Add support for the display.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
---
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 136 ++++++++++++++++++
1 file changed, 136 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
index 036ac403ed21..421eb4592b61 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
@@ -423,6 +423,42 @@ static void kd50t048a_gip_sequence(struct st7701 *st7701)
0xFF, 0xFF, 0xFF, 0xFF, 0x10, 0x45, 0x67, 0x98, 0xBA);
}
+static void rg_arc_gip_sequence(struct st7701 *st7701)
+{
+ st7701_switch_cmd_bkx(st7701, true, 3);
+ ST7701_DSI(st7701, 0xEF, 0x08);
+ st7701_switch_cmd_bkx(st7701, true, 0);
+ ST7701_DSI(st7701, 0xC7, 0x04);
+ ST7701_DSI(st7701, 0xCC, 0x38);
+ st7701_switch_cmd_bkx(st7701, true, 1);
+ ST7701_DSI(st7701, 0xB9, 0x10);
+ ST7701_DSI(st7701, 0xBC, 0x03);
+ ST7701_DSI(st7701, 0xC0, 0x89);
+ ST7701_DSI(st7701, 0xE0, 0x00, 0x00, 0x02);
+ ST7701_DSI(st7701, 0xE1, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00,
+ 0x00, 0x00, 0x20, 0x20);
+ ST7701_DSI(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
+ ST7701_DSI(st7701, 0xE3, 0x00, 0x00, 0x33, 0x00);
+ ST7701_DSI(st7701, 0xE4, 0x22, 0x00);
+ ST7701_DSI(st7701, 0xE5, 0x04, 0x5C, 0xA0, 0xA0, 0x06, 0x5C, 0xA0,
+ 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
+ ST7701_DSI(st7701, 0xE6, 0x00, 0x00, 0x33, 0x00);
+ ST7701_DSI(st7701, 0xE7, 0x22, 0x00);
+ ST7701_DSI(st7701, 0xE8, 0x05, 0x5C, 0xA0, 0xA0, 0x07, 0x5C, 0xA0,
+ 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
+ ST7701_DSI(st7701, 0xEB, 0x02, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00);
+ ST7701_DSI(st7701, 0xEC, 0x00, 0x00);
+ ST7701_DSI(st7701, 0xED, 0xFA, 0x45, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF,
+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB0, 0x54, 0xAF);
+ ST7701_DSI(st7701, 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54);
+ st7701_switch_cmd_bkx(st7701, false, 0);
+ ST7701_DSI(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0x17);
+ ST7701_DSI(st7701, MIPI_DCS_SET_PIXEL_FORMAT, 0x77);
+ ST7701_DSI(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00);
+ msleep(120);
+}
+
static int st7701_prepare(struct drm_panel *panel)
{
struct st7701 *st7701 = panel_to_st7701(panel);
@@ -839,6 +875,105 @@ static const struct st7701_panel_desc kd50t048a_desc = {
.gip_sequence = kd50t048a_gip_sequence,
};
+static const struct drm_display_mode rg_arc_mode = {
+ .clock = 25600,
+
+ .hdisplay = 480,
+ .hsync_start = 480 + 60,
+ .hsync_end = 480 + 60 + 42,
+ .htotal = 480 + 60 + 42 + 60,
+
+ .vdisplay = 640,
+ .vsync_start = 640 + 10,
+ .vsync_end = 640 + 10 + 4,
+ .vtotal = 640 + 10 + 4 + 16,
+
+ .width_mm = 63,
+ .height_mm = 84,
+
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct st7701_panel_desc rg_arc_desc = {
+ .mode = &rg_arc_mode,
+ .lanes = 2,
+ .format = MIPI_DSI_FMT_RGB888,
+ .panel_sleep_delay = 80,
+
+ .pv_gamma = {
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1d),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x12),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x0a),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x25),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x03),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c)
+ },
+ .nv_gamma = {
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1e),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x11),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x08),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x26),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x15),
+
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f),
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
+ CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c)
+ },
+ .nlinv = 0,
+ .vop_uv = 4500000,
+ .vcom_uv = 762500,
+ .vgh_mv = 15000,
+ .vgl_mv = -9510,
+ .avdd_mv = 6600,
+ .avcl_mv = -4400,
+ .gamma_op_bias = OP_BIAS_MIDDLE,
+ .input_op_bias = OP_BIAS_MIN,
+ .output_op_bias = OP_BIAS_MIN,
+ .t2d_ns = 1600,
+ .t3d_ns = 10400,
+ .eot_en = true,
+ .gip_sequence = rg_arc_gip_sequence,
+};
+
static int st7701_dsi_probe(struct mipi_dsi_device *dsi)
{
const struct st7701_panel_desc *desc;
@@ -917,6 +1052,7 @@ static void st7701_dsi_remove(struct mipi_dsi_device *dsi)
}
static const struct of_device_id st7701_of_match[] = {
+ { .compatible = "anbernic,rg-arc-panel", .data = &rg_arc_desc },
{ .compatible = "densitron,dmt028vghmcmi-1a", .data = &dmt028vghmcmi_1a_desc },
{ .compatible = "elida,kd50t048a", .data = &kd50t048a_desc },
{ .compatible = "techstar,ts8550b", .data = &ts8550b_desc },
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
@ 2023-12-09 8:13 ` Krzysztof Kozlowski
2023-12-09 23:38 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2023-12-09 8:13 UTC (permalink / raw)
To: Chris Morgan, devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
On 08/12/2023 16:48, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The RG-ARC panel is a panel specific to the Anbernic RG-ARC. It is 4
> inches in size (diagonally) with a resolution of 480x640.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
2023-12-09 8:13 ` Krzysztof Kozlowski
@ 2023-12-09 23:38 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: Linus Walleij @ 2023-12-09 23:38 UTC (permalink / raw)
To: Chris Morgan
Cc: devicetree, dri-devel, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
On Fri, Dec 8, 2023 at 4:48 PM Chris Morgan <macroalpha82@gmail.com> wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The RG-ARC panel is a panel specific to the Anbernic RG-ARC. It is 4
> inches in size (diagonally) with a resolution of 480x640.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
@ 2023-12-11 8:28 ` neil.armstrong
2023-12-11 23:44 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: neil.armstrong @ 2023-12-11 8:28 UTC (permalink / raw)
To: Chris Morgan, devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, jagan, Chris Morgan
On 08/12/2023 16:48, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The Powkiddy RG-ARC is a series of 2 handheld devices, each with a 4
> inch 480x640 display. Add support for the display.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7701.c | 136 ++++++++++++++++++
> 1 file changed, 136 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> index 036ac403ed21..421eb4592b61 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> @@ -423,6 +423,42 @@ static void kd50t048a_gip_sequence(struct st7701 *st7701)
> 0xFF, 0xFF, 0xFF, 0xFF, 0x10, 0x45, 0x67, 0x98, 0xBA);
> }
>
> +static void rg_arc_gip_sequence(struct st7701 *st7701)
> +{
> + st7701_switch_cmd_bkx(st7701, true, 3);
> + ST7701_DSI(st7701, 0xEF, 0x08);
> + st7701_switch_cmd_bkx(st7701, true, 0);
> + ST7701_DSI(st7701, 0xC7, 0x04);
> + ST7701_DSI(st7701, 0xCC, 0x38);
> + st7701_switch_cmd_bkx(st7701, true, 1);
> + ST7701_DSI(st7701, 0xB9, 0x10);
> + ST7701_DSI(st7701, 0xBC, 0x03);
> + ST7701_DSI(st7701, 0xC0, 0x89);
> + ST7701_DSI(st7701, 0xE0, 0x00, 0x00, 0x02);
> + ST7701_DSI(st7701, 0xE1, 0x04, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00,
> + 0x00, 0x00, 0x20, 0x20);
> + ST7701_DSI(st7701, 0xE2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
> + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> + ST7701_DSI(st7701, 0xE3, 0x00, 0x00, 0x33, 0x00);
> + ST7701_DSI(st7701, 0xE4, 0x22, 0x00);
> + ST7701_DSI(st7701, 0xE5, 0x04, 0x5C, 0xA0, 0xA0, 0x06, 0x5C, 0xA0,
> + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> + ST7701_DSI(st7701, 0xE6, 0x00, 0x00, 0x33, 0x00);
> + ST7701_DSI(st7701, 0xE7, 0x22, 0x00);
> + ST7701_DSI(st7701, 0xE8, 0x05, 0x5C, 0xA0, 0xA0, 0x07, 0x5C, 0xA0,
> + 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
> + ST7701_DSI(st7701, 0xEB, 0x02, 0x00, 0x40, 0x40, 0x00, 0x00, 0x00);
> + ST7701_DSI(st7701, 0xEC, 0x00, 0x00);
> + ST7701_DSI(st7701, 0xED, 0xFA, 0x45, 0x0B, 0xFF, 0xFF, 0xFF, 0xFF,
> + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xB0, 0x54, 0xAF);
> + ST7701_DSI(st7701, 0xEF, 0x08, 0x08, 0x08, 0x45, 0x3F, 0x54);
> + st7701_switch_cmd_bkx(st7701, false, 0);
> + ST7701_DSI(st7701, MIPI_DCS_SET_ADDRESS_MODE, 0x17);
> + ST7701_DSI(st7701, MIPI_DCS_SET_PIXEL_FORMAT, 0x77);
> + ST7701_DSI(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00);
> + msleep(120);
> +}
> +
> static int st7701_prepare(struct drm_panel *panel)
> {
> struct st7701 *st7701 = panel_to_st7701(panel);
> @@ -839,6 +875,105 @@ static const struct st7701_panel_desc kd50t048a_desc = {
> .gip_sequence = kd50t048a_gip_sequence,
> };
>
> +static const struct drm_display_mode rg_arc_mode = {
> + .clock = 25600,
> +
> + .hdisplay = 480,
> + .hsync_start = 480 + 60,
> + .hsync_end = 480 + 60 + 42,
> + .htotal = 480 + 60 + 42 + 60,
> +
> + .vdisplay = 640,
> + .vsync_start = 640 + 10,
> + .vsync_end = 640 + 10 + 4,
> + .vtotal = 640 + 10 + 4 + 16,
> +
> + .width_mm = 63,
> + .height_mm = 84,
> +
> + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct st7701_panel_desc rg_arc_desc = {
> + .mode = &rg_arc_mode,
> + .lanes = 2,
> + .format = MIPI_DSI_FMT_RGB888,
> + .panel_sleep_delay = 80,
> +
> + .pv_gamma = {
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1d),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x12),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x0a),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x25),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x03),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c)
> + },
> + .nv_gamma = {
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0x01) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC0_MASK, 0),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC4_MASK, 0x16),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC8_MASK, 0x1e),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC16_MASK, 0x0e),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC24_MASK, 0x11),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC52_MASK, 0x06),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC80_MASK, 0x0c),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC108_MASK, 0x08),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC147_MASK, 0x09),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC175_MASK, 0x26),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC203_MASK, 0x00),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC231_MASK, 0x15),
> +
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC239_MASK, 0x00),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC247_MASK, 0x3f),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC251_MASK, 0x3f),
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_AJ_MASK, 0) |
> + CFIELD_PREP(DSI_CMD2_BK0_GAMCTRL_VC255_MASK, 0x1c)
> + },
> + .nlinv = 0,
> + .vop_uv = 4500000,
> + .vcom_uv = 762500,
> + .vgh_mv = 15000,
> + .vgl_mv = -9510,
> + .avdd_mv = 6600,
> + .avcl_mv = -4400,
> + .gamma_op_bias = OP_BIAS_MIDDLE,
> + .input_op_bias = OP_BIAS_MIN,
> + .output_op_bias = OP_BIAS_MIN,
> + .t2d_ns = 1600,
> + .t3d_ns = 10400,
> + .eot_en = true,
> + .gip_sequence = rg_arc_gip_sequence,
> +};
> +
> static int st7701_dsi_probe(struct mipi_dsi_device *dsi)
> {
> const struct st7701_panel_desc *desc;
> @@ -917,6 +1052,7 @@ static void st7701_dsi_remove(struct mipi_dsi_device *dsi)
> }
>
> static const struct of_device_id st7701_of_match[] = {
> + { .compatible = "anbernic,rg-arc-panel", .data = &rg_arc_desc },
> { .compatible = "densitron,dmt028vghmcmi-1a", .data = &dmt028vghmcmi_1a_desc },
> { .compatible = "elida,kd50t048a", .data = &kd50t048a_desc },
> { .compatible = "techstar,ts8550b", .data = &ts8550b_desc },
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
@ 2023-12-11 8:29 ` neil.armstrong
2023-12-11 23:43 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: neil.armstrong @ 2023-12-11 8:29 UTC (permalink / raw)
To: Chris Morgan, devicetree
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, jagan, Chris Morgan
On 08/12/2023 16:48, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The AVCL register, according to the datasheet, comes in increments
> of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
> by 0x3). The current calculation is done by adding the defined
> AVCL value in mV to -4400 and then dividing by 200 to get the register
> value. Unfortunately if I subtract -4400 from -4400 I get -8800, which
> divided by 200 gives me -44. If I instead subtract -4400 from -4400
> I get 0, which divided by 200 gives me 0. Based on the datasheet this
> is the expected register value.
>
> Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing")
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7701.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7701.c b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> index 0459965e1b4f..036ac403ed21 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7701.c
> @@ -288,7 +288,7 @@ static void st7701_init_sequence(struct st7701 *st7701)
> FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVDD_MASK,
> DIV_ROUND_CLOSEST(desc->avdd_mv - 6200, 200)) |
> FIELD_PREP(DSI_CMD2_BK1_PWRCTRL2_AVCL_MASK,
> - DIV_ROUND_CLOSEST(-4400 + desc->avcl_mv, 200)));
> + DIV_ROUND_CLOSEST(-4400 - desc->avcl_mv, 200)));
>
> /* T2D = 0.2us * T2D[3:0] */
> ST7701_DSI(st7701, DSI_CMD2_BK1_SPD1,
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 0/3] Add Support for RG-ARC Panel
2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
` (2 preceding siblings ...)
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
@ 2023-12-11 9:16 ` Neil Armstrong
3 siblings, 0 replies; 11+ messages in thread
From: Neil Armstrong @ 2023-12-11 9:16 UTC (permalink / raw)
To: devicetree, Chris Morgan
Cc: dri-devel, linus.walleij, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, jagan, Chris Morgan
Hi,
On Fri, 08 Dec 2023 09:48:44 -0600, Chris Morgan wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> Add support for the Anbernic RG-ARC display panel as used in the
> RG-ARC S and RG-ARC D handheld gaming devices from Anbernic.
>
> Chris Morgan (3):
> drm/panel: st7701: Fix AVCL calculation
> dt-bindings: display: st7701: Add Anbernic RG-ARC panel
> drm/panel: st7701: Add Anbernic RG-ARC Panel Support
>
> [...]
Thanks, Applied to https://anongit.freedesktop.org/git/drm/drm-misc.git (drm-misc-next)
[1/3] drm/panel: st7701: Fix AVCL calculation
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=799825aa87200ade1ba21db853d1c2ff720dcfe0
[2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=acbf9184a87d5d6868809baa3a6c7d0537d1f321
[3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=a7890252c1a314654862944cf4733e4333b76e25
--
Neil
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
2023-12-11 8:29 ` neil.armstrong
@ 2023-12-11 23:43 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: Linus Walleij @ 2023-12-11 23:43 UTC (permalink / raw)
To: Chris Morgan
Cc: devicetree, dri-devel, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
On Fri, Dec 8, 2023 at 4:48 PM Chris Morgan <macroalpha82@gmail.com> wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The AVCL register, according to the datasheet, comes in increments
> of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
> by 0x3). The current calculation is done by adding the defined
> AVCL value in mV to -4400 and then dividing by 200 to get the register
> value. Unfortunately if I subtract -4400 from -4400 I get -8800, which
> divided by 200 gives me -44. If I instead subtract -4400 from -4400
> I get 0, which divided by 200 gives me 0. Based on the datasheet this
> is the expected register value.
>
> Fixes: 83b7a8e7e88e ("drm/panel/panel-sitronix-st7701: Parametrize voltage and timing")
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Good catch!
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
2023-12-11 8:28 ` neil.armstrong
@ 2023-12-11 23:44 ` Linus Walleij
1 sibling, 0 replies; 11+ messages in thread
From: Linus Walleij @ 2023-12-11 23:44 UTC (permalink / raw)
To: Chris Morgan
Cc: devicetree, dri-devel, marex, conor+dt, krzysztof.kozlowski+dt,
robh+dt, daniel, airlied, sam, quic_jesszhan, neil.armstrong,
jagan, Chris Morgan
On Fri, Dec 8, 2023 at 4:48 PM Chris Morgan <macroalpha82@gmail.com> wrote:
> From: Chris Morgan <macromorgan@hotmail.com>
>
> The Powkiddy RG-ARC is a series of 2 handheld devices, each with a 4
> inch 480x640 display. Add support for the display.
>
> Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-12-11 23:44 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
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2023-12-08 15:48 [PATCH 0/3] Add Support for RG-ARC Panel Chris Morgan
2023-12-08 15:48 ` [PATCH 1/3] drm/panel: st7701: Fix AVCL calculation Chris Morgan
2023-12-11 8:29 ` neil.armstrong
2023-12-11 23:43 ` Linus Walleij
2023-12-08 15:48 ` [PATCH 2/3] dt-bindings: display: st7701: Add Anbernic RG-ARC panel Chris Morgan
2023-12-09 8:13 ` Krzysztof Kozlowski
2023-12-09 23:38 ` Linus Walleij
2023-12-08 15:48 ` [PATCH 3/3] drm/panel: st7701: Add Anbernic RG-ARC Panel Support Chris Morgan
2023-12-11 8:28 ` neil.armstrong
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2023-12-11 9:16 ` [PATCH 0/3] Add Support for RG-ARC Panel Neil Armstrong
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