From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3086631; Mon, 5 Aug 2024 05:16:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722835002; cv=none; b=cUtiNYYdeWykfYru4kqBN6/Oyi1QhcllV0UrIoDbwwUllvPLIJmW+AlAILSAHo45GqmcTfr3iWB7sUaq1nW7an6lb9kd1zxHhBgJIU7dspCLEkBGHLfP5ASR2VJmFJcMYfwY937iMoTTO3ilYex00dpNQi+sPAA2vWDejfQW+kM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722835002; c=relaxed/simple; bh=m3gU1OlTZ8095LDUuHrD0vdOwEUtiIdxYNOczF0Rm1g=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=ECy35LquP2JZaivb81E8FaMpkaENT2gFPjMp5Iy0c97pmpuUK1O/I+DsXGYK7sVv19GMPgCij5Fbn+Hae0eUXWPhZs1n6Oi8/qt+RF7AlWahVL9RiezWJWIdTMe3kitXlnHzStiwoo1GsQTCt0BaxdALy6rJpMujllXQ0+zOdMA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iZSj1jTc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iZSj1jTc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51298C32782; Mon, 5 Aug 2024 05:16:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1722835002; bh=m3gU1OlTZ8095LDUuHrD0vdOwEUtiIdxYNOczF0Rm1g=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=iZSj1jTcCpX4fW/UukuFfXOZRKhombezWVZMsrA6BVpUEemHRdUGAFRJRhjpRZMT8 PC0i352AXbG0C+2rtvmcwuuMrUq0YwvRH/0UDCodzxSFx4bEvBXDnHpxiFEhZWa4av OBW5dFugr27f7s9kuBCVQ8jKs9Kvs56rywrgVCXAq8MR2GBZfvlgN1SqLhuZ8gPGG6 sS0CPZZvOak27w2kCT2/Pl4fZAYOts3zY3WcYL9ojKQGsgLcEiMRMElODGW5Hs6FKk IYl8VP3Q7QuNUEWO8eDhR2bAWRH8K7px+C0XGOCBYqa224jgFMkmUjN/B6hBCNHEXA dFUtVuMDmUaVQ== Message-ID: <6fe0d3de-3885-43dd-97f3-b181ef1386d5@kernel.org> Date: Mon, 5 Aug 2024 07:16:35 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: rockchip: Add base DT for rk3528 SoC To: =?UTF-8?Q?Heiko_St=C3=BCbner?= , Dragan Simic Cc: Yao Zi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Greg Kroah-Hartman , Jiri Slaby , Chris Morgan , Jonas Karlman , Tim Lunn , Andy Yan , Muhammed Efe Cetin , Jagan Teki , Ondrej Jirman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org References: <20240803125510.4699-2-ziyao@disroot.org> <2408413.9XhxPE3A7Q@diego> <81147f0205c2a9555c9c64e4f7a69b6b@manjaro.org> <10256980.nnTZe4vzsl@diego> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 04/08/2024 17:51, Heiko Stübner wrote: > Am Sonntag, 4. August 2024, 15:59:19 CEST schrieb Dragan Simic: >> On 2024-08-04 15:44, Heiko Stübner wrote: >>> Am Sonntag, 4. August 2024, 15:25:47 CEST schrieb Dragan Simic: >>>> On 2024-08-04 15:20, Yao Zi wrote: >>>>> On Sun, Aug 04, 2024 at 12:05:11PM +0200, Krzysztof Kozlowski wrote: >>>>>> On 03/08/2024 14:55, Yao Zi wrote: >>>>>>> This initial device tree describes CPU, interrupts and UART on the chip >>>>>>> and is able to boot into basic kernel with only UART. Cache information >>>>>>> is omitted for now as there is no precise documentation. Support for >>>>>>> other features will be added later. >>>>>>> >>>>>>> Signed-off-by: Yao Zi >>>>>>> --- >>>>>>> arch/arm64/boot/dts/rockchip/rk3528.dtsi | 182 +++++++++++++++++++++++ >>>>>>> 1 file changed, 182 insertions(+) >>>>>>> create mode 100644 arch/arm64/boot/dts/rockchip/rk3528.dtsi >>>>>>> >>>>>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi >>>>>>> new file mode 100644 >>>>>>> index 000000000000..77687d9e7e80 >>>>>>> --- /dev/null >>>>>>> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi >>>>>>> @@ -0,0 +1,182 @@ >>>>>>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >>>>>>> +/* >>>>>>> + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. >>>>>>> + * Copyright (c) 2024 Yao Zi >>>>>>> + */ >>>>>>> + >>>>>>> +#include >>>>>>> +#include >>>>>>> + >>>>>>> +/ { >>>>>>> + compatible = "rockchip,rk3528"; >>>>>>> + >>>>>>> + interrupt-parent = <&gic>; >>>>>>> + #address-cells = <2>; >>>>>>> + #size-cells = <2>; >>>>>>> + >>>>>>> + aliases { >>>>>>> + serial0 = &uart0; >>>>>>> + serial1 = &uart1; >>>>>>> + serial2 = &uart2; >>>>>>> + serial3 = &uart3; >>>>>>> + serial4 = &uart4; >>>>>>> + serial5 = &uart5; >>>>>>> + serial6 = &uart6; >>>>>>> + serial7 = &uart7; >>>>>>> + }; >>>>>>> + >>>>>>> + cpus { >>>>>>> + #address-cells = <1>; >>>>>>> + #size-cells = <0>; >>>>>>> + >>>>>>> + cpu-map { >>>>>>> + cluster0 { >>>>>>> + core0 { >>>>>>> + cpu = <&cpu0>; >>>>>>> + }; >>>>>>> + core1 { >>>>>>> + cpu = <&cpu1>; >>>>>>> + }; >>>>>>> + core2 { >>>>>>> + cpu = <&cpu2>; >>>>>>> + }; >>>>>>> + core3 { >>>>>>> + cpu = <&cpu3>; >>>>>>> + }; >>>>>>> + }; >>>>>>> + }; >>>>>>> + >>>>>>> + cpu0: cpu@0 { >>>>>>> + device_type = "cpu"; >>>>>>> + compatible = "arm,cortex-a53"; >>>>>>> + reg = <0x0>; >>>>>>> + enable-method = "psci"; >>>>>>> + }; >>>>>>> + >>>>>>> + cpu1: cpu@1 { >>>>>>> + device_type = "cpu"; >>>>>>> + compatible = "arm,cortex-a53"; >>>>>>> + reg = <0x1>; >>>>>>> + enable-method = "psci"; >>>>>>> + }; >>>>>>> + >>>>>>> + cpu2: cpu@2 { >>>>>>> + device_type = "cpu"; >>>>>>> + compatible = "arm,cortex-a53"; >>>>>>> + reg = <0x2>; >>>>>>> + enable-method = "psci"; >>>>>>> + }; >>>>>>> + >>>>>>> + cpu3: cpu@3 { >>>>>>> + device_type = "cpu"; >>>>>>> + compatible = "arm,cortex-a53"; >>>>>>> + reg = <0x3>; >>>>>>> + enable-method = "psci"; >>>>>>> + }; >>>>>>> + }; >>>>>>> + >>>>>>> + psci { >>>>>>> + compatible = "arm,psci-1.0", "arm,psci-0.2"; >>>>>>> + method = "smc"; >>>>>>> + }; >>>>>>> + >>>>>>> + timer { >>>>>>> + compatible = "arm,armv8-timer"; >>>>>>> + interrupts = , >>>>>>> + , >>>>>>> + , >>>>>>> + ; >>>>>>> + }; >>>>>>> + >>>>>>> + xin24m: xin24m { >>>>>> >>>>>> Please use name for all fixed clocks which matches current format >>>>>> recommendation: 'clock-([0-9]+|[a-z0-9-]+)+' >>>>> >>>>> Will be fixed in next revision. >>>> >>>> Hmm, why should we apply that rule to the xin24m clock, which is >>>> named exactly like that everywhere else in Rockchip SoC dtsi files? >>>> It's much better to remain consistent. >>> >>> bindings or how we write devicetrees evolve over time ... similarly the >>> xin24m name comes from more than 10 years ago. >>> >>> We also name all those regulator nodes regulator-foo now, which in turn >>> automatically does enforce a nice sorting rule to keep all the >>> regulators >>> around the same area ;-) >>> >>> So I don't see a problem of going with xin24m: clock-xin24m {} >> >> I agree that using "clock-xin24m" makes more sense in general, but the >> trouble is that we can't rename the already existing instances of >> "xin24m", >> because that has become part of the ABI. Thus, I'm not sure that >> breaking >> away from the legacy brings benefits in this particular case. > > In the regulator case, we have _new_ boards using the new _node_-names > but I don't see any renaming of old boards and also don't think we should. > > But that still does not keep us from using the nicer naming convention in > new boards ;-) . > > > Same with xin24m. We're talking only about the node-name here. The > phandle stays the same and also the actual clock name stays the same and > really only the actual node name you need to look for in /proc/device-tree > changes ;-) . > > So I don't see the need to go about changing all the old socs, but new > additions should use improved naming conventions. > > xin24m: clock-xin24m { > compatible = "fixed-clock"; > #clock-cells = <0>; > clock-frequency = <24000000>; > clock-output-names = "xin24m"; Just to make it clear - doc clearly says the preferred name is: "clock-frequency". Best regards, Krzysztof