From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Vikash Garodia <quic_vgarodia@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC v2 1/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5
Date: Tue, 12 Aug 2025 16:26:02 +0200 [thread overview]
Message-ID: <6ffa8d6f-d5fb-4a94-ab7c-1a923cae1332@oss.qualcomm.com> (raw)
In-Reply-To: <be5f18d9-a642-4b4e-bf69-e0108e988faf@kernel.org>
On 8/12/25 4:24 PM, Krzysztof Kozlowski wrote:
> On 12/08/2025 16:21, Konrad Dybcio wrote:
>> On 8/6/25 2:38 PM, Krzysztof Kozlowski wrote:
>>> Add Iris video codec to SM8750 SoC, which comes with significantly
>>> different powering up sequence than previous SM8650, thus different
>>> clocks and resets. For consistency keep existing clock and clock-names
>>> naming, so the list shares common part.
>>>
>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>>
>>> ---
>>
>> [...]
>>
>>> + iris_opp_table: opp-table {
>>> + compatible = "operating-points-v2";
>>> +
>>> + opp-240000000 {
>>> + opp-hz = /bits/ 64 <240000000>;
>>> + required-opps = <&rpmhpd_opp_low_svs_d1>,
>>> + <&rpmhpd_opp_low_svs_d1>;
>>> + };
>>> +
>>> + opp-338000000 {
>>> + opp-hz = /bits/ 64 <338000000>;
>>> + required-opps = <&rpmhpd_opp_low_svs>,
>>> + <&rpmhpd_opp_low_svs>;
>>> + };
>>> +
>>> + opp-420000000 {
>>> + opp-hz = /bits/ 64 <420000000>;
>>> + required-opps = <&rpmhpd_opp_svs>,
>>> + <&rpmhpd_opp_svs>;
>>> + };
>>> +
>>> + opp-444000000 {
>>> + opp-hz = /bits/ 64 <444000000>;
>>> + required-opps = <&rpmhpd_opp_svs_l1>,
>>> + <&rpmhpd_opp_svs_l1>;
>>> + };
>>> +
>>> + opp-533333334 {
>>> + opp-hz = /bits/ 64 <533333334>;
>>> + required-opps = <&rpmhpd_opp_nom>,
>>> + <&rpmhpd_opp_nom>;
>>> + };
>>
>> There's an additional OPP: 570 MHz @ NOM_L1
>>
>> +Dmitry, Vikash, please make sure you're OK with the iommu entries
>
>
> That opp has troubles with clock, so would need some fixed in videocc or
> iris, AFAIK. Otherwise you will just PM OPP failures. I can add it
> though, at the end DTS should be independent of drivers. :)
Weird, there's an entry in the frequency table for it (well, * 3 the
rate) and it comes out of the same PLL as other ones.. what sort of
opp failures do you see?
Konrad
next prev parent reply other threads:[~2025-08-12 14:26 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-06 12:38 [PATCH RFC v2 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Krzysztof Kozlowski
2025-08-06 12:38 ` [PATCH RFC v2 1/3] " Krzysztof Kozlowski
2025-08-12 14:21 ` Konrad Dybcio
2025-08-12 14:24 ` Krzysztof Kozlowski
2025-08-12 14:26 ` Konrad Dybcio [this message]
2025-08-12 14:39 ` Krzysztof Kozlowski
2025-08-12 14:45 ` Krzysztof Kozlowski
2025-08-12 14:54 ` Krzysztof Kozlowski
2025-08-12 14:39 ` Dmitry Baryshkov
2025-08-12 15:31 ` Vikash Garodia
2025-08-13 18:41 ` Dmitry Baryshkov
2025-08-14 5:19 ` Vikash Garodia
2025-08-06 12:38 ` [PATCH DO NOT MERGE RFC v2 2/3] arm64: dts: qcom: sm8750-mtp: Enable Iris codec Krzysztof Kozlowski
2025-08-09 9:42 ` Dmitry Baryshkov
2025-08-11 16:10 ` Bjorn Andersson
2025-08-06 12:38 ` [PATCH DO NOT MERGE RFC v2 3/3] arm64: dts: qcom: sm8750-qrd: " Krzysztof Kozlowski
2025-08-06 14:40 ` [PATCH RFC v2 0/3] arm64: dts: qcom: sm8750: Add Iris VPU v3.5 Rob Herring (Arm)
2025-08-11 16:15 ` Bjorn Andersson
2025-08-11 17:27 ` Neil Armstrong
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