From: "Heiko Stübner" <heiko@sntech.de>
To: Chukun Pan <amadeus@jmu.edu.cn>
Cc: amadeus@jmu.edu.cn, conor+dt@kernel.org,
devicetree@vger.kernel.org, krzk+dt@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
robh@kernel.org, ziyao@disroot.org
Subject: Re: [PATCH 1/1] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC
Date: Thu, 06 Mar 2025 14:51:16 +0100 [thread overview]
Message-ID: <7020561.MhkbZ0Pkbq@diego> (raw)
In-Reply-To: <20250306134002.380690-1-amadeus@jmu.edu.cn>
Am Donnerstag, 6. März 2025, 14:40:02 MEZ schrieb Chukun Pan:
> Hi,
>
> > That sram is part of the soc (and has an mmio-address), so I'd think
> > it should live inside the soc node?
>
> But soc ranges starts from 0xfe000000, I don't know whether to change it.
> And all other nodes are 0xf..., except this sram.
> Any suggestions would be greatly appreciated.
darn ... I didn't realize that this is not sram, but main memory :-)
in freescale/s32g3.dtsi and blaize/blaize-blzp1600.dtsi I see structures like:
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
scmi_shmem: shm@d0000000 {
compatible = "arm,scmi-shmem";
reg = <0x0 0xd0000000 0x0 0x80>;
no-map;
};
};
does something like this work on the rk3528?
Heiko
next prev parent reply other threads:[~2025-03-06 13:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 13:10 [PATCH 0/1] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC Chukun Pan
2025-03-06 13:10 ` [PATCH 1/1] " Chukun Pan
2025-03-06 13:29 ` Heiko Stübner
2025-03-06 13:40 ` Chukun Pan
2025-03-06 13:45 ` Krzysztof Kozlowski
2025-03-06 14:20 ` Chukun Pan
2025-03-06 14:25 ` Heiko Stübner
2025-03-06 14:50 ` Chukun Pan
2025-03-06 13:51 ` Heiko Stübner [this message]
2025-03-06 13:54 ` Krzysztof Kozlowski
2025-03-06 13:57 ` Heiko Stübner
2025-03-06 14:54 ` Jonas Karlman
2025-03-06 14:54 ` Sudeep Holla
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