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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>,
	manivannan.sadhasivam@linaro.org, alim.akhtar@samsung.com,
	avri.altman@wdc.com, bvanassche@acm.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, andersson@kernel.org,
	konrad.dybcio@linaro.org, James.Bottomley@HansenPartnership.com,
	martin.petersen@oracle.com, agross@kernel.org
Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	quic_narepall@quicinc.com, quic_nitirawa@quicinc.com
Subject: Re: [PATCH V2 1/3] dt-bindings: ufs: qcom: Document ice configuration table
Date: Tue, 29 Oct 2024 13:13:31 +0100	[thread overview]
Message-ID: <70a1599e-67a2-4f39-acac-f4fe83b96b86@kernel.org> (raw)
In-Reply-To: <20241029113003.18820-2-quic_rdwivedi@quicinc.com>

On 29/10/2024 12:30, Ram Kumar Dwivedi wrote:
> There are three allocators supported for inline crypto engine:
> Floor based, Static and Instantaneous allocator.
> 
> Document the compatible used for the allocator configurations
> for inline crypto engine found.
> 
> Co-developed-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
> Signed-off-by: Naveen Kumar Goud Arepalli <quic_narepall@quicinc.com>
> Co-developed-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
> Signed-off-by: Ram Kumar Dwivedi <quic_rdwivedi@quicinc.com>
> ---
>  .../devicetree/bindings/ufs/qcom,ufs.yaml     | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> index 25a5edeea164..069bd87d3404 100644
> --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
> @@ -108,6 +108,11 @@ properties:
>      description:
>        GPIO connected to the RESET pin of the UFS memory device.
>  
> +  ice-config:
> +    type: object
> +    description:
> +      ICE configuration table for Qualcom SOC

Not much improved, still not constrained, this can be literally
anything, right? No explanation what this is.

This does not look even like hardware property, although with such
explanation tricky to judge.

NAK, please reach internally to qcom folks so they will guide you how
bindings should look like. You are *not supposed* to send downstream
stuff to us.

> +
>  required:
>    - compatible
>    - reg
> @@ -350,5 +355,24 @@ examples:
>                              <0 0>,
>                              <0 0>;
>              qcom,ice = <&ice>;
> +
> +            ice_cfg: ice-config {
> +                static-alloc {
> +                     ice-allocator-name = "static-alloc";
> +                     rx-alloc-percent = <60>;
> +                     status = "okay";

Drop. Same everywhere else.


Best regards,
Krzysztof


  reply	other threads:[~2024-10-29 12:13 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-29 11:30 [PATCH V2 0/3] Add support for multiple ICE allocators Ram Kumar Dwivedi
2024-10-29 11:30 ` [PATCH V2 1/3] dt-bindings: ufs: qcom: Document ice configuration table Ram Kumar Dwivedi
2024-10-29 12:13   ` Krzysztof Kozlowski [this message]
2024-10-29 11:30 ` [PATCH V2 2/3] arm64: dts: qcom: sm8650: Add ICE allocator entries Ram Kumar Dwivedi
2024-10-29 12:14   ` Krzysztof Kozlowski
2024-10-29 11:30 ` [PATCH V2 3/3] scsi: ufs: qcom: Add support for multiple ICE allocators Ram Kumar Dwivedi
2024-10-30  1:41   ` kernel test robot

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