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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: adrian.ho.yin.ng@intel.com, gregkh@linuxfoundation.org,
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, linux-usb@vger.kernel.org,
	devicetree@vger.kernel.org, Thinh.Nguyen@synopsys.com,
	p.zabel@pengutronix.de
Subject: Re: [PATCH v2 1/2] dt-bindings: usb: Add Intel SoCFPGA USB controller
Date: Mon, 24 Jul 2023 09:04:36 +0200	[thread overview]
Message-ID: <70a823a4-54d1-18a3-3d77-45564d88e8f1@linaro.org> (raw)
In-Reply-To: <0d12c7a196d6ad81cfc69b281dd1c4cca623d9bd.1690179693.git.adrian.ho.yin.ng@intel.com>

On 24/07/2023 08:36, adrian.ho.yin.ng@intel.com wrote:
> From: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> 
> Existing binding intel,keembay-dwc3.yaml does not have the required
> properties for Intel SoCFPGA devices.
> Introduce new binding description for Intel SoCFPGA USB controller
> which will be used for current and future SoCFPGA devices.
> 
> Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> ---
>  .../bindings/usb/intel,socfpga-dwc3.yaml      | 84 +++++++++++++++++++
>  1 file changed, 84 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> 
> diff --git a/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> new file mode 100644
> index 000000000000..e36b087c2651
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/intel,socfpga-dwc3.yaml
> @@ -0,0 +1,84 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/usb/intel,socfpga-dwc3.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel SoCFPGA DWC3 USB controller
> +
> +maintainers:
> +  - Adrian Ng Ho Yin <adrian.ho.yin.ng@intel.com>
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - intel,agilex5-dwc3
> +      - const: intel,socfpga-dwc3

So you did not even wait for my answer? What happened here with this
compatible? I asked you to change file name, not add intel,socfpga-dwc3.
Again - why using different style for Agilex? Which style is correct?

> +
> +  reg:
> +    description: Offset and length of DWC3 controller register

What happened here? It wasn't here before.

> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: Controller Master/Core clock
> +      - description: Controller Suspend clock
> +
> +  ranges: true
> +
> +  resets:
> +    description: A list of phandles for resets listed in reset-names

Neither was this useless description, it is obvious.

> +    maxItems: 2
> +
> +  reset-names:
> +    items:
> +      - const: dwc3
> +      - const: dwc3-ecc
> +
> +  '#address-cells':
> +    enum: [ 1, 2 ]
> +
> +  '#size-cells':
> +    enum: [ 1, 2 ]
> +
> +# Required child node:
> +
> +patternProperties:
> +  "^usb@[0-9a-f]+$":
> +    $ref: snps,dwc3.yaml#
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - resets
> +  - ranges
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/reset/altr,rst-mgr.h>
> +
> +    usb@11000000 {
> +          compatible = "intel,agilex5-dwc3", "intel,socfpga-dwc3";

Still wrong indentation....

> +          reg = <0x11000000 0x100000>;
> +          ranges;
> +          clocks = <&clkmgr 54>,
> +                   <&clkmgr 55>;
> +          resets = <&rst USB0_RESET>, <&rst USB1_RESET>;
> +          reset-names = "dwc3", "dwc3-ecc";
> +          #address-cells = <1>;
> +          #size-cells = <1>;
> +
> +          usb@11000000 {
> +                compatible = "snps,dwc3";
> +                reg = <0x11000000 0x100000>;
> +                interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
> +                dr_mode = "host";
> +          };
> +    };
> +

Drop trailing line.

Instead of resending just after your reply, allow for reviewer to respond.

Best regards,
Krzysztof


  reply	other threads:[~2023-07-24  7:04 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-24  6:36 [PATCH v2 0/2] Add support for Intel SocFPGA DWC3 USB controller adrian.ho.yin.ng
2023-07-24  6:36 ` [PATCH v2 1/2] dt-bindings: usb: Add Intel SoCFPGA " adrian.ho.yin.ng
2023-07-24  7:04   ` Krzysztof Kozlowski [this message]
2023-07-24  7:18     ` Ng, Adrian Ho Yin
2023-07-24  7:27       ` Krzysztof Kozlowski
2023-07-24  7:53         ` Ng, Adrian Ho Yin
2023-07-24  8:55           ` Krzysztof Kozlowski
2023-07-27  2:09             ` Ng, Adrian Ho Yin
2023-07-25 13:25   ` Greg KH
2023-07-27  2:11     ` Ng, Adrian Ho Yin
2023-07-26 16:29   ` Rob Herring
2023-07-27  8:11     ` Ng, Adrian Ho Yin
2023-07-24  6:37 ` [PATCH v2 2/2] usb: dwc3: of-simple: Add compatible string for Intel Agilex5 platform adrian.ho.yin.ng
2023-07-24  7:28   ` Krzysztof Kozlowski

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