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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id e17-20020a170906505100b006fece722508sm4615390ejk.135.2022.06.26.23.55.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 26 Jun 2022 23:55:22 -0700 (PDT) Message-ID: <70cd0066-9aa7-ca41-ad61-898d491328aa@linaro.org> Date: Mon, 27 Jun 2022 08:55:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH 07/14] riscv: dts: canaan: fix the k210's memory node Content-Language: en-US To: Conor.Dooley@microchip.com, damien.lemoal@opensource.wdc.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: fancer.lancer@gmail.com, tglx@linutronix.de, sam@ravnborg.org, mail@conchuod.ie, Eugeniy.Paltsev@synopsys.com, daniel.lezcano@linaro.org, paul.walmsley@sifive.com, aou@eecs.berkeley.edu, masahiroy@kernel.org, geert@linux-m68k.org, lgirdwood@gmail.com, niklas.cassel@wdc.com, dillon.minfei@gmail.com, jee.heng.sia@intel.com, thierry.reding@gmail.com, joabreu@synopsys.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, airlied@linux.ie, linux-kernel@vger.kernel.org, vkoul@kernel.org, palmer@dabbelt.com, broonie@kernel.org, dmaengine@vger.kernel.org, alsa-devel@alsa-project.org, linux-spi@vger.kernel.org, linux-riscv@lists.infradead.org, palmer@rivosinc.com, daniel@ffwll.ch References: <20220618123035.563070-1-mail@conchuod.ie> <20220618123035.563070-8-mail@conchuod.ie> <9cd60b3b-44fe-62ac-9874-80ae2223d078@opensource.wdc.com> <891cf74c-ac0a-b380-1d5f-dd7ce5aeda9d@opensource.wdc.com> <6c9de242-6ccf-49a2-8422-e6949c5169ff@microchip.com> From: Krzysztof Kozlowski In-Reply-To: <6c9de242-6ccf-49a2-8422-e6949c5169ff@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 21/06/2022 11:49, Conor.Dooley@microchip.com wrote: > On 20/06/2022 01:25, Damien Le Moal wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 6/20/22 08:54, Conor.Dooley@microchip.com wrote: >>> On 20/06/2022 00:38, Damien Le Moal wrote: >>>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >>>> >>>> On 6/18/22 21:30, Conor Dooley wrote: >>>>> From: Conor Dooley >>>>> >>>>> The k210 memory node has a compatible string that does not match with >>>>> any driver or dt-binding & has several non standard properties. >>>>> Replace the reg names with a comment and delete the rest. >>>>> >>>>> Signed-off-by: Conor Dooley >>>>> --- >>>>> --- >>>>> arch/riscv/boot/dts/canaan/k210.dtsi | 6 ------ >>>>> 1 file changed, 6 deletions(-) >>>>> >>>>> diff --git a/arch/riscv/boot/dts/canaan/k210.dtsi b/arch/riscv/boot/dts/canaan/k210.dtsi >>>>> index 44d338514761..287ea6eebe47 100644 >>>>> --- a/arch/riscv/boot/dts/canaan/k210.dtsi >>>>> +++ b/arch/riscv/boot/dts/canaan/k210.dtsi >>>>> @@ -69,15 +69,9 @@ cpu1_intc: interrupt-controller { >>>>> >>>>> sram: memory@80000000 { >>>>> device_type = "memory"; >>>>> - compatible = "canaan,k210-sram"; >>>>> reg = <0x80000000 0x400000>, >>>>> <0x80400000 0x200000>, >>>>> <0x80600000 0x200000>; >>>>> - reg-names = "sram0", "sram1", "aisram"; >>>>> - clocks = <&sysclk K210_CLK_SRAM0>, >>>>> - <&sysclk K210_CLK_SRAM1>, >>>>> - <&sysclk K210_CLK_AI>; >>>>> - clock-names = "sram0", "sram1", "aisram"; >>>>> }; >>>> >>>> These are used by u-boot to setup the memory clocks and initialize the >>>> aisram. Sure the kernel actually does not use this, but to be in sync with >>>> u-boot DT, I would prefer keeping this as is. Right now, u-boot *and* the >>>> kernel work fine with both u-boot internal DT and the kernel DT. >>> >>> Right, but unfortunately that desire alone doesn't do anything about >>> the dtbs_check complaints. >>> >>> I guess the alternative approach of actually documenting the compatible >>> would be more palatable? >> >> Yes, I think so. That would allow keeping the fields without the DTB build >> warnings. > > Hmm looks like that approach contradicts the dt-schema; > https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/memory.yaml > > @Rob,Krzysztof what is one meant to do here? Why do you think it contradict bindings? Bindings for memory allow additional properties, so you just need to create binding for this one. And make it a correct binding, IOW, be sure that these clocks are real etc. Although usually we had separate bindings (and device drivers) for memory controllers, instead of including them in the "memory" node. Best regards, Krzysztof