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Date: Tue, 24 Jun 2025 12:32:23 -0500
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Subject: Re: [PATCH 0/4] Add 4-bit SPI bus width on target devices
To: yankei.fong@altera.com, Rob Herring <robh@kernel.org>,
 Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley
 <conor+dt@kernel.org>,
 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
 <devicetree@vger.kernel.org>, open list <linux-kernel@vger.kernel.org>,
 Matthew Gerlach <matthew.gerlach@altera.com>
References: <cover.1750747163.git.yan.kei.fong@altera.com>
Content-Language: en-US
From: Dinh Nguyen <dinguyen@kernel.org>
In-Reply-To: <cover.1750747163.git.yan.kei.fong@altera.com>
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On 6/24/25 01:52, yankei.fong@altera.com wrote:
> From: "Fong, Yan Kei" <yan.kei.fong@altera.com>
> 
> Add SPI bus width properties to correctly describe the hardware on the following devices:
>   - Stratix10
>   - Agilex
>   - Agilex5
>   - N5X
> 
> Fong, Yan Kei (4):
>    arm64: dts: socfpga: n5x: Add 4-bit SPI bus width
>    arm64: dts: socfpga: stratix10: Add 4-bit SPI bus width
>    arm64: dts: socfpga: agilex: Add 4-bit SPI bus width
>    arm64: dts: socfpga: agilex5: Add 4-bit SPI bus width
> 
>   arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 ++
>   arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts    | 2 ++
>   arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts     | 2 ++
>   arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts        | 2 ++
>   4 files changed, 8 insertions(+)
> 

This is for the QSPI driver right? I don't even see the driver using 
this property. So how would this help?