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[83.9.32.53]) by smtp.gmail.com with ESMTPSA id y1-20020a0565123f0100b004cb0256116csm3326103lfa.26.2023.01.12.07.39.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 12 Jan 2023 07:39:57 -0800 (PST) Message-ID: <719bfea0-0aea-fbab-3ffa-3f6c330f16d2@linaro.org> Date: Thu, 12 Jan 2023 16:39:54 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.1 Subject: Re: [PATCH 4/5] arm64: dts: qcom: msm8996: add CBF device entry Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org References: <20230111195754.2593134-1-dmitry.baryshkov@linaro.org> <20230111195754.2593134-5-dmitry.baryshkov@linaro.org> <3cd04f83-94df-931c-728a-f015ad05d876@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 12.01.2023 16:38, Dmitry Baryshkov wrote: > On 12/01/2023 17:05, Konrad Dybcio wrote: >> >> >> On 11.01.2023 20:57, Dmitry Baryshkov wrote: >>> Add device tree node for the CBF clock. >>> >>> Signed-off-by: Dmitry Baryshkov >>> --- >>>   arch/arm64/boot/dts/qcom/msm8996.dtsi | 7 +++++++ >>>   1 file changed, 7 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> index 37ebd8a3b2c8..e5a638b85ffc 100644 >>> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi >>> @@ -3558,6 +3558,13 @@ saw3: syscon@9a10000 { >>>               reg = <0x09a10000 0x1000>; >>>           }; >>>   +        cbf: clock-controller@9a11000 { >>> +            compatible = "qcom,msm8996-cbf"; >>> +            reg = <0x09a11000 0x10000>; >>> +            clocks = <&rpmcc RPM_SMD_BB_CLK1>, <&apcs_glb>; >> Shouldn't this be RPM_SMD_XO_A_CLK_SRC? I don't see BB_CLK >> referenced *anywhere* downstream, other than being defined >> in the 8996 GCC driver.. > > Good question. On the schematics I have the CXO input is connected to the BBCLK1 PMIC pin. I guess it's a question of how RPM resolves this internally.. I think I was once told that you just ask RPM nicely to turn on the clock and everything is handled for you from there on, so perhaps we don't need to poke at BBCLK manually if it's only used as XO parent? Konrad > >> >> Konrad >> >>> +            #clock-cells = <0>; >>> +        }; >>> + >>>           intc: interrupt-controller@9bc0000 { >>>               compatible = "qcom,msm8996-gic-v3", "arm,gic-v3"; >>>               #interrupt-cells = <3>; >