[PATCH v4 1/9] media: dt-bindings: venus: Add qcom,msm8939 schema

Erikas Bitovtas
2026-05-05T21:45:51Z

From: André Apitzsch <git@apitzsch.eu>

Add a schema description for the Venus video decoder/encoder IP in
MSM8939.

Signed-off-by: André Apitzsch <git@apitzsch.eu>
Signed-off-by: Erikas Bitovtas <xerikasxx@gmail.com>
---
.../bindings/media/qcom,msm8939-venus.yaml | 75 ++++++++++++++++++++++
1 file changed, 75 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml
new file mode 100644
index 000000000000..5bbc7cfb61c0
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,msm8939-venus.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,msm8939-venus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm MSM8939 Venus video encode and decode accelerators
+
+maintainers:
+ - André Apitzsch <git@apitzsch.eu>
+ - Erikas Bitovtas <xerikasxx@gmail.com>
+
+description: |
+ The Venus IP is a video encode and decode accelerator present
+ on Qualcomm platforms
+
+allOf:
+ - $ref: qcom,venus-common.yaml#
+
+properties:
+ compatible:
+ const: qcom,msm8939-venus
+
+ power-domains:
+ maxItems: 3
+
+ power-domain-names:
+ items:
+ - const: venus
+ - const: core0
+ - const: core1
+
+ clocks:
+ maxItems: 5
+
+ clock-names:
+ items:
+ - const: core
+ - const: iface
+ - const: bus
+ - const: core0
+ - const: core1
+
+ iommus:
+ maxItems: 1
+
+required:
+ - compatible
+ - iommus
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/qcom,gcc-msm8939.h>
+
+ video-codec@1d00000 {
+ compatible = "qcom,msm8939-venus";
+ reg = <0x01d00000 0xff000>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
+ <&gcc GCC_VENUS0_AHB_CLK>,
+ <&gcc GCC_VENUS0_AXI_CLK>,
+ <&gcc GCC_VENUS0_CORE0_VCODEC0_CLK>,
+ <&gcc GCC_VENUS0_CORE1_VCODEC0_CLK>;
+ clock-names = "core", "iface", "bus", "core0", "core1";
+ power-domains = <&gcc VENUS_GDSC>,
+ <&gcc VENUS_CORE0_GDSC>,
+ <&gcc VENUS_CORE1_GDSC>;
+ power-domain-names = "venus", "core0", "core1";
+ iommus = <&apps_iommu 5>;
+ memory-region = <&venus_mem>;
+ status = "disabled";
+ };

--
2.54.0