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From: Sumit Gupta <sumitg@nvidia.com>
To: Viresh Kumar <viresh.kumar@linaro.org>
Cc: <treding@nvidia.com>, <krzysztof.kozlowski@linaro.org>,
	<dmitry.osipenko@collabora.com>, <rafael@kernel.org>,
	<jonathanh@nvidia.com>, <robh+dt@kernel.org>,
	<lpieralisi@kernel.org>, <helgaas@kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-pm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <mmaddireddy@nvidia.com>,
	<kw@linux.com>, <bhelgaas@google.com>, <vidyas@nvidia.com>,
	<sanjayc@nvidia.com>, <ksitaraman@nvidia.com>, <ishah@nvidia.com>,
	<bbasu@nvidia.com>, Sumit Gupta <sumitg@nvidia.com>
Subject: Re: [Patch v6 6/9] cpufreq: tegra194: add OPP support and set bandwidth
Date: Tue, 18 Apr 2023 15:51:49 +0530	[thread overview]
Message-ID: <71e45a06-6b02-6b29-b9d9-0c34ff508b64@nvidia.com> (raw)
In-Reply-To: <20230418091315.bxh4hp6g3vekdi2r@vireshk-i7>



On 18/04/23 14:43, Viresh Kumar wrote:
> External email: Use caution opening links or attachments
> 
> 
> On 11-04-23, 16:29, Sumit Gupta wrote:
>> Add support to use OPP table from DT in Tegra194 cpufreq driver.
>> Tegra SoC's receive the frequency lookup table (LUT) from BPMP-FW.
>> Cross check the OPP's present in DT against the LUT from BPMP-FW
>> and enable only those DT OPP's which are present in LUT also.
>>
>> The OPP table in DT has CPU Frequency to bandwidth mapping where
>> the bandwidth value is per MC channel. DRAM bandwidth depends on the
>> number of MC channels which can vary as per the boot configuration.
>> This per channel bandwidth from OPP table will be later converted by
>> MC driver to final bandwidth value by multiplying with number of
>> channels before sending the request to BPMP-FW.
>>
>> If OPP table is not present in DT, then use the LUT from BPMP-FW
>> directy as the CPU frequency table and not do the DRAM frequency
>> scaling which is same as the current behavior.
>>
>> Now, as the CPU Frequency table is being controlling through OPP
>> table in DT. Keeping fewer entries in the table will create less
>> frequency steps and can help to scale fast to high frequencies
>> when required.
>>
>> Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
>> ---
>>   drivers/cpufreq/tegra194-cpufreq.c | 156 ++++++++++++++++++++++++++---
>>   1 file changed, 143 insertions(+), 13 deletions(-)
> 
> Can this be applied independently of the rest of the series ?
> 
> --
> viresh

Yes, this can be applied independently.

Thank you,
Sumit Gupta

  reply	other threads:[~2023-04-18 10:23 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-11 10:59 [Patch v6 0/9] Tegra234 Memory interconnect support Sumit Gupta
2023-04-11 10:59 ` [Patch v6 1/9] memory: tegra: add interconnect support for DRAM scaling in Tegra234 Sumit Gupta
2023-04-11 10:59 ` [Patch v6 2/9] memory: tegra: add mc clients for Tegra234 Sumit Gupta
2023-04-11 10:59 ` [Patch v6 3/9] memory: tegra: add software mc clients in Tegra234 Sumit Gupta
2023-04-11 10:59 ` [Patch v6 4/9] dt-bindings: tegra: add icc ids for dummy MC clients Sumit Gupta
2023-04-11 10:59 ` [Patch v6 5/9] memory: tegra: make cpu cluster bw request a multiple of mc channels Sumit Gupta
2023-04-11 10:59 ` [Patch v6 6/9] cpufreq: tegra194: add OPP support and set bandwidth Sumit Gupta
2023-04-18  9:13   ` Viresh Kumar
2023-04-18 10:21     ` Sumit Gupta [this message]
2023-04-18 10:38   ` Viresh Kumar
2023-04-11 11:00 ` [Patch v6 7/9] PCI: tegra194: Fix possible array out of bounds access Sumit Gupta
2023-04-21 13:12   ` Lorenzo Pieralisi
2023-04-24 13:03     ` Sumit Gupta
2023-04-11 11:00 ` [Patch v6 8/9] PCI: tegra194: Add interconnect support in Tegra234 Sumit Gupta
2023-04-13 14:52   ` Lorenzo Pieralisi
2023-04-14 10:54     ` Sumit Gupta
2023-04-21 13:11       ` Lorenzo Pieralisi
2023-04-24 13:02         ` Sumit Gupta
2023-04-11 11:00 ` [Patch v6 9/9] arm64: tegra: Add cpu OPP tables and interconnects property Sumit Gupta

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