From: Ritesh Harjani <riteshh@codeaurora.org>
To: Stephen Boyd <sboyd@codeaurora.org>
Cc: ulf.hansson@linaro.org, linux-mmc@vger.kernel.org,
adrian.hunter@intel.com, shawn.lin@rock-chips.com,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org,
david.brown@linaro.org, andy.gross@linaro.org,
linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
kdorfman@codeaurora.org, david.griego@linaro.org,
stummala@codeaurora.org, venkatg@codeaurora.org,
rnayak@codeaurora.org, pramod.gurav@linaro.org
Subject: Re: [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate
Date: Wed, 9 Nov 2016 17:23:04 +0530 [thread overview]
Message-ID: <723dd8bd-c13c-ebd1-f391-2d9f7d56a852@codeaurora.org> (raw)
In-Reply-To: <20161108230217.GM16026@codeaurora.org>
Hi Stephen,
Thanks for the review.
On 11/9/2016 4:32 AM, Stephen Boyd wrote:
> On 11/07, Ritesh Harjani wrote:
>> diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
>> index b904c33..1b3e8d2 100644
>> --- a/drivers/clk/qcom/clk-rcg.h
>> +++ b/drivers/clk/qcom/clk-rcg.h
>> @@ -173,6 +173,7 @@ struct clk_rcg2 {
>> #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)
>>
>> extern const struct clk_ops clk_rcg2_ops;
>> +extern const struct clk_ops clk_rcg2_floor_ops;
>> extern const struct clk_ops clk_rcg2_shared_ops;
>> extern const struct clk_ops clk_edp_pixel_ops;
>> extern const struct clk_ops clk_byte_ops;
>> diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
>> index a071bba..04433a6 100644
>> --- a/drivers/clk/qcom/clk-rcg2.c
>> +++ b/drivers/clk/qcom/clk-rcg2.c
>> @@ -47,6 +47,11 @@
>> #define N_REG 0xc
>> #define D_REG 0x10
>>
>> +enum {
>> + FLOOR,
>> + CEIL,
>> +};
>
> Give it a name.
Yes, sure. I will keep it as freq_policy.
>
>> +
>> static int clk_rcg2_is_enabled(struct clk_hw *hw)
>> {
>> struct clk_rcg2 *rcg = to_clk_rcg2(hw);
>> @@ -176,15 +181,25 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 index)
>> return calc_rate(parent_rate, m, n, mode, hid_div);
>> }
>>
>> -static int _freq_tbl_determine_rate(struct clk_hw *hw,
>> - const struct freq_tbl *f, struct clk_rate_request *req)
>> +static int _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f,
>> + struct clk_rate_request *req, bool match)
>
> Use the enum please. Also name it something besides match.
> policy?
Sure. (freq_policy)
>
>> {
>> unsigned long clk_flags, rate = req->rate;
>> struct clk_hw *p;
>> struct clk_rcg2 *rcg = to_clk_rcg2(hw);
>> int index;
>>
>> - f = qcom_find_freq(f, rate);
>> + switch (match) {
>> + case FLOOR:
>> + f = qcom_find_freq_floor(f, rate);
>> + break;
>> + case CEIL:
>> + f = qcom_find_freq(f, rate);
>> + break;
>> + default:
>> + return -EINVAL;
>> + };
>> +
>> if (!f)
>> return -EINVAL;
>>
>> diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
>> index fffcbaf..cf6b87f 100644
>> --- a/drivers/clk/qcom/common.c
>> +++ b/drivers/clk/qcom/common.c
>> @@ -46,6 +46,32 @@ struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
>> }
>> EXPORT_SYMBOL_GPL(qcom_find_freq);
>>
>> +const
>> +struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
>
> We can't put const and struct on the same line?
Ok sure.
>
>> + unsigned long rate)
>> +{
>> + int size = 0;
>> +
>> + if (!f)
>> + return NULL;
>> +
>> + /*
>> + * The freq table has entries in the ascending order of frequencies
>> + * To find the floor for a given frequency, we need to do a reverse
>> + * lookup of the table
>> + */
>> + for (; f->freq; f++, size++)
>> + ;
>> +
>> + for (f--; size; f--, size--)
>> + if (rate >= f->freq)
>> + return f;
>
> I don't understand why we can't do this while iterating through
> the table. We shouldn't need to size up the frequency table first.
>
> const struct freq_tbl *best = NULL;
>
> for ( ; f->freq; f++) {
> if (rate >= f->freq)
> best = f->freq;
> else
> break;
> }
>
> return best;
>
Yes, will do above change.
>> +
>> + /* could not find any rates lower than *rate* */
>
>> + return NULL;
>> +}
>> +EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-11-09 11:53 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-07 11:24 [PATCH v6 00/14] mmc: sdhci-msm: Add clk-rates, DDR, HS400 support Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate Ritesh Harjani
2016-11-07 13:51 ` [PATCH] clk: qcom: fix semicolon.cocci warnings kbuild test robot
[not found] ` <1478517877-23733-3-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 13:51 ` [PATCH v6 02/14] clk: qcom: Add rcg ops to return floor value closest to the requested rate kbuild test robot
2016-11-08 23:02 ` Stephen Boyd
2016-11-09 11:53 ` Ritesh Harjani [this message]
2016-11-07 11:24 ` [PATCH v6 03/14] clk: qcom: Move all sdcc rcgs to use clk_rcg2_floor_ops Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 05/14] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-11-08 23:06 ` Stephen Boyd
[not found] ` <20161108230622.GN16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 23:14 ` Arnd Bergmann
2016-11-09 12:06 ` Ritesh Harjani
2016-11-09 20:43 ` Stephen Boyd
2016-11-14 6:03 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 06/14] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
[not found] ` <1478517877-23733-7-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:15 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 07/14] mmc: sdhci-msm: Enable few quirks Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 08/14] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-11-08 12:16 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 09/14] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-11-08 12:20 ` Adrian Hunter
[not found] ` <1478517877-23733-1-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-07 11:24 ` [PATCH v6 01/14] clk: Add clk_hw_get_clk() helper API to be used by clk providers Ritesh Harjani
[not found] ` <1478517877-23733-2-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 3:37 ` Rajendra Nayak
[not found] ` <58214862.8080604-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 4:08 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 04/14] mmc: sdhci-msm: Change poor style writel/readl of registers Ritesh Harjani
2016-11-08 23:07 ` Stephen Boyd
[not found] ` <20161108230724.GO16026-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-09 11:55 ` Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 10/14] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
2016-11-07 11:24 ` [PATCH v6 12/14] mmc: sdhci-msm: Save the calculated tuning phase Ritesh Harjani
2016-11-08 12:41 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 11/14] mmc: sdhci-msm: Add HS400 platform support Ritesh Harjani
2016-11-08 12:37 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 13/14] mmc: sdhci-msm: Add calibration tuning for CDCLP533 circuit Ritesh Harjani
2016-11-08 12:50 ` Adrian Hunter
2016-11-07 11:24 ` [PATCH v6 14/14] sdhci: sdhci-msm: update dll configuration Ritesh Harjani
[not found] ` <1478517877-23733-15-git-send-email-riteshh-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-08 12:57 ` Adrian Hunter
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