From mboxrd@z Thu Jan 1 00:00:00 1970 From: Laurent Pinchart Subject: Re: [PATCH 11/17] arm64: dts: r8a77965: Add VSP instances Date: Fri, 08 Jun 2018 14:00:36 +0300 Message-ID: <7269469.ESYJcRDGIc@avalon> References: <20180426165346.494-1-kieran.bingham+renesas@ideasonboard.com> <1787243.JuNJAuBqMb@avalon> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7Bit Return-path: In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Geert Uytterhoeven Cc: Kieran Bingham , Mark Rutland , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Takeshi Kihara , Catalin Marinas , Magnus Damm , open list , Rob Herring , Linux-Renesas , Simon Horman , Will Deacon , "moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)" , Sergei Shtylyov List-Id: devicetree@vger.kernel.org Hi Geert, On Friday, 8 June 2018 12:29:29 EEST Geert Uytterhoeven wrote: > On Thu, Apr 26, 2018 at 11:11 PM, Laurent Pinchart wrote: > > On Thursday, 26 April 2018 19:53:40 EEST Kieran Bingham wrote: > >> The r8a77965 has 4 VSP instances. > >> > >> Based on a similar patch of the R8A7796 device tree > >> by Laurent Pinchart . > >> > >> Signed-off-by: Takeshi Kihara > >> [Kieran: Rebased to top of tree, fixed sort orders] > >> Signed-off-by: Kieran Bingham > >> --- > >> > >> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 44 +++++++++++++++++++++++ > >> 1 file changed, 44 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi > >> b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index > >> 1f44ed7c1b1c..e92e6b03333a 100644 > >> --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi > >> +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi > >> @@ -1025,6 +1047,17 @@ > >> resets = <&cpg 611>; > >> }; > >> > >> + vspd0: vsp@fea20000 { > >> + compatible = "renesas,vsp2"; > >> + reg = <0 0xfea20000 0 0x4000>; > > > > RFP2 has a CLUT so the register range needs to be extended. I'd recommend > > covering the entire space (0x8000) even if no LUT or CLU module is > > present. > > Even on V3H/V3M, which have some part of the CLUT, and could do > with 0x5000? > > Note that this makes it overlap with fcpvd0 on all R-Car Gen3 SoCs, > as mentioned by Simon on IRC. My bad :-/ I'll submit fixes shortly. > >> + interrupts = ; > >> + clocks = <&cpg CPG_MOD 623>; > >> + power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; > >> + resets = <&cpg 623>; > >> + > >> + renesas,fcp = <&fcpvd0>; > >> + }; > >> + > >> fcpvd0: fcp@fea27000 { > >> compatible = "renesas,fcpv"; > >> reg = <0 0xfea27000 0 0x200>; -- Regards, Laurent Pinchart