devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Adrian Hunter <adrian.hunter@intel.com>
To: BOUGH CHEN <haibo.chen@nxp.com>,
	"ulf.hansson@linaro.org" <ulf.hansson@linaro.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>
Cc: "kernel@pengutronix.de" <kernel@pengutronix.de>,
	dl-linux-imx <linux-imx@nxp.com>,
	"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH v2 3/3] mmc: add HS400 support for iMX7ULP
Date: Fri, 3 May 2019 09:53:45 +0300	[thread overview]
Message-ID: <72ddece9-1138-a31c-b55e-788a26ec907f@intel.com> (raw)
In-Reply-To: <20190429090310.25484-4-haibo.chen@nxp.com>

On 29/04/19 11:55 AM, BOUGH CHEN wrote:
> Add HS400 support for iMX7ULP B0.
> 
> According to IC suggest, need to clear the STROBE_DLL_CTRL_RESET
> before any setting of STROBE_DLL_CTRL register.
> 
> USDHC has register bits(bit[27~20] of register STROBE_DLL_CTRL)
> for slave sel value. If this register bits value is 0,  it needs
> 256 ref_clk cycles to update slave sel value. IC suggest to set
> bit[27~20] to 0x4, it only need 4 ref_clk cycle to update slave
> sel value. This will short the lock time of slave.
> 
> i.MX7ULP B0 will need more time to lock the REF and SLV, so change
> to add 5us delay.
> 
> Signed-off-by: Haibo Chen <haibo.chen@nxp.com>

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> ---
>  drivers/mmc/host/sdhci-esdhc-imx.c | 11 ++++++++---
>  1 file changed, 8 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 053e8586d557..c391510e9ef4 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -74,6 +74,7 @@
>  #define ESDHC_STROBE_DLL_CTRL_ENABLE	(1 << 0)
>  #define ESDHC_STROBE_DLL_CTRL_RESET	(1 << 1)
>  #define ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT	3
> +#define ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT	(4 << 20)
>  
>  #define ESDHC_STROBE_DLL_STATUS		0x74
>  #define ESDHC_STROBE_DLL_STS_REF_LOCK	(1 << 1)
> @@ -210,7 +211,7 @@ static const struct esdhc_soc_data usdhc_imx7d_data = {
>  static struct esdhc_soc_data usdhc_imx7ulp_data = {
>  	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
>  			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
> -			| ESDHC_FLAG_PMQOS,
> +			| ESDHC_FLAG_PMQOS | ESDHC_FLAG_HS400,
>  };
>  
>  static struct esdhc_soc_data usdhc_imx8qxp_data = {
> @@ -994,15 +995,19 @@ static void esdhc_set_strobe_dll(struct sdhci_host *host)
>  	/* force a reset on strobe dll */
>  	writel(ESDHC_STROBE_DLL_CTRL_RESET,
>  		host->ioaddr + ESDHC_STROBE_DLL_CTRL);
> +	/* clear the reset bit on strobe dll before any setting */
> +	writel(0, host->ioaddr + ESDHC_STROBE_DLL_CTRL);
> +
>  	/*
>  	 * enable strobe dll ctrl and adjust the delay target
>  	 * for the uSDHC loopback read clock
>  	 */
>  	v = ESDHC_STROBE_DLL_CTRL_ENABLE |
> +		ESDHC_STROBE_DLL_CTRL_SLV_UPDATE_INT_DEFAULT |
>  		(7 << ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_SHIFT);
>  	writel(v, host->ioaddr + ESDHC_STROBE_DLL_CTRL);
> -	/* wait 1us to make sure strobe dll status register stable */
> -	udelay(1);
> +	/* wait 5us to make sure strobe dll status register stable */
> +	udelay(5);
>  	v = readl(host->ioaddr + ESDHC_STROBE_DLL_STATUS);
>  	if (!(v & ESDHC_STROBE_DLL_STS_REF_LOCK))
>  		dev_warn(mmc_dev(host->mmc),
> 

  parent reply	other threads:[~2019-05-03  6:53 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-29  8:55 [PATCH v2 0/3] Add struct esdhc_soc_data for i.MX7ULP BOUGH CHEN
2019-04-29  8:55 ` [PATCH v2 1/3] dt-bindings: mmc: fsl-imx-esdhc: add imx7ulp compatible string BOUGH CHEN
2019-05-01 20:23   ` Rob Herring
2019-04-29  8:55 ` [PATCH v2 2/3] mmc: sdhci-esdhc-imx: add pm_qos to interact with cpuidle BOUGH CHEN
2019-04-29 10:24   ` Aisheng Dong
2019-05-03  6:53   ` Adrian Hunter
2019-04-29  8:55 ` [PATCH v2 3/3] mmc: add HS400 support for iMX7ULP BOUGH CHEN
2019-04-29 10:29   ` Aisheng Dong
2019-05-03  6:53   ` Adrian Hunter [this message]
2019-05-03 13:29 ` [PATCH v2 0/3] Add struct esdhc_soc_data for i.MX7ULP Ulf Hansson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=72ddece9-1138-a31c-b55e-788a26ec907f@intel.com \
    --to=adrian.hunter@intel.com \
    --cc=devicetree@vger.kernel.org \
    --cc=haibo.chen@nxp.com \
    --cc=kernel@pengutronix.de \
    --cc=linux-imx@nxp.com \
    --cc=linux-mmc@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=robh+dt@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    --cc=ulf.hansson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).