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Wed, 16 Nov 2022 08:39:53 -0800 (PST) Received: from [192.168.31.208] ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id k8-20020a17090632c800b007a62215eb4esm7205202ejk.16.2022.11.16.08.39.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 16 Nov 2022 08:39:53 -0800 (PST) Message-ID: <730467dc-419f-bcb6-c4d8-24951b4dde62@linaro.org> Date: Wed, 16 Nov 2022 17:39:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH v6 5/7] arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add navigation mezzanine dts To: Bryan O'Donoghue , robert.foss@linaro.org, todor.too@gmail.com, agross@kernel.org, andersson@kernel.org, mchehab@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, dmitry.baryshkov@linaro.org, vladimir.zapolskiy@linaro.org Cc: sakari.ailus@iki.fi, hverkuil@xs4all.nl, laurent.pinchart@ideasonboard.com, quic_mmitkov@quicinc.com, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org References: <20221116162801.546737-1-bryan.odonoghue@linaro.org> <20221116162801.546737-6-bryan.odonoghue@linaro.org> From: Konrad Dybcio In-Reply-To: <20221116162801.546737-6-bryan.odonoghue@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 16/11/2022 17:27, Bryan O'Donoghue wrote: > Move the dts data for the rb3 navigation mezzanine into its own dts file. > > Suggested-by: Dmitry Baryshkov > Signed-off-by: Bryan O'Donoghue > --- > arch/arm64/boot/dts/qcom/Makefile | 1 + > .../sdm845-db845c-navigation-mezzanine.dts | 104 ++++++++++++++++++ > arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 96 ---------------- > 3 files changed, 105 insertions(+), 96 deletions(-) > create mode 100644 arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts > > diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile > index afe496a93f945..4c81c1ee7f7c7 100644 > --- a/arch/arm64/boot/dts/qcom/Makefile > +++ b/arch/arm64/boot/dts/qcom/Makefile > @@ -132,6 +132,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r1.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r2.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb > +dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c-navigation-mezzanine.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyln.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-lg-judyp.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-mtp.dtb > diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts > new file mode 100644 > index 0000000000000..a21caa6f3fa25 > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dts > @@ -0,0 +1,104 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2022, Linaro Ltd. > + */ > + > +/dts-v1/; > + > +#include "sdm845-db845c.dts" > + > +&camss { > + vdda-phy-supply = <&vreg_l1a_0p875>; > + vdda-pll-supply = <&vreg_l26a_1p2>; > + > + status = "okay"; > + > + ports { > + port@0 { > + csiphy0_ep: endpoint { > + data-lanes = <0 1 2 3>; > + remote-endpoint = <&ov8856_ep>; > + }; > + }; > + }; > +}; > + > +&cci { > + status = "okay"; > +}; > + > +&cci_i2c0 { > + camera@10 { > + compatible = "ovti,ov8856"; > + reg = <0x10>; > + > + /* CAM0_RST_N */ > + reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; > + pinctrl-names = "default"; > + pinctrl-0 = <&cam0_default>; > + > + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; > + clock-names = "xvclk"; > + clock-frequency = <19200000>; > + > + /* > + * The &vreg_s4a_1p8 trace is powered on as a, > + * so it is represented by a fixed regulator. > + * > + * The 2.8V vdda-supply and 1.2V vddd-supply regulators > + * both have to be enabled through the power management > + * gpios. > + */ > + dovdd-supply = <&vreg_lvs1a_1p8>; > + avdd-supply = <&cam0_avdd_2v8>; > + dvdd-supply = <&cam0_dvdd_1v2>; > + > + port { > + ov8856_ep: endpoint { > + link-frequencies = /bits/ 64 > + <360000000 180000000>; > + data-lanes = <1 2 3 4>; > + remote-endpoint = <&csiphy0_ep>; > + }; > + }; > + }; > +}; > + > +&cci_i2c1 { > + camera@60 { > + compatible = "ovti,ov7251"; > + > + /* I2C address as per ov7251.txt linux documentation */ > + reg = <0x60>; > + > + /* CAM3_RST_N */ > + enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&cam3_default>; > + > + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; > + clock-names = "xclk"; > + clock-frequency = <24000000>; > + > + /* > + * The &vreg_s4a_1p8 trace always powered on. > + * > + * The 2.8V vdda-supply regulator is enabled when the > + * vreg_s4a_1p8 trace is pulled high. > + * It too is represented by a fixed regulator. > + * > + * No 1.2V vddd-supply regulator is used. > + */ > + vdddo-supply = <&vreg_lvs1a_1p8>; > + vdda-supply = <&cam3_avdd_2v8>; > + > + status = "disabled"; I know you're just moving things around, but.. any reason this thing is still disabled? Konrad > + > + port { > + ov7251_ep: endpoint { > + data-lanes = <0 1>; > +/* remote-endpoint = <&csiphy3_ep>; */ > + }; > + }; > + }; > +}; > diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > index be946f71666bc..f41c6d600ea8c 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts > @@ -1174,102 +1174,6 @@ &pm8998_gpio { > > }; > > -&cci { > - status = "okay"; > -}; > - > -&camss { > - vdda-phy-supply = <&vreg_l1a_0p875>; > - vdda-pll-supply = <&vreg_l26a_1p2>; > - > - status = "okay"; > - > - ports { > - port@0 { > - csiphy0_ep: endpoint { > - data-lanes = <0 1 2 3>; > - remote-endpoint = <&ov8856_ep>; > - }; > - }; > - }; > -}; > - > -&cci_i2c0 { > - camera@10 { > - compatible = "ovti,ov8856"; > - reg = <0x10>; > - > - /* CAM0_RST_N */ > - reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; > - pinctrl-names = "default"; > - pinctrl-0 = <&cam0_default>; > - > - clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; > - clock-names = "xvclk"; > - clock-frequency = <19200000>; > - > - /* > - * The &vreg_s4a_1p8 trace is powered on as a, > - * so it is represented by a fixed regulator. > - * > - * The 2.8V vdda-supply and 1.2V vddd-supply regulators > - * both have to be enabled through the power management > - * gpios. > - */ > - dovdd-supply = <&vreg_lvs1a_1p8>; > - avdd-supply = <&cam0_avdd_2v8>; > - dvdd-supply = <&cam0_dvdd_1v2>; > - > - port { > - ov8856_ep: endpoint { > - link-frequencies = /bits/ 64 > - <360000000 180000000>; > - data-lanes = <1 2 3 4>; > - remote-endpoint = <&csiphy0_ep>; > - }; > - }; > - }; > -}; > - > -&cci_i2c1 { > - camera@60 { > - compatible = "ovti,ov7251"; > - > - /* I2C address as per ov7251.txt linux documentation */ > - reg = <0x60>; > - > - /* CAM3_RST_N */ > - enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>; > - pinctrl-names = "default"; > - pinctrl-0 = <&cam3_default>; > - > - clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; > - clock-names = "xclk"; > - clock-frequency = <24000000>; > - > - /* > - * The &vreg_s4a_1p8 trace always powered on. > - * > - * The 2.8V vdda-supply regulator is enabled when the > - * vreg_s4a_1p8 trace is pulled high. > - * It too is represented by a fixed regulator. > - * > - * No 1.2V vddd-supply regulator is used. > - */ > - vdddo-supply = <&vreg_lvs1a_1p8>; > - vdda-supply = <&cam3_avdd_2v8>; > - > - status = "disabled"; > - > - port { > - ov7251_ep: endpoint { > - data-lanes = <0 1>; > -/* remote-endpoint = <&csiphy3_ep>; */ > - }; > - }; > - }; > -}; > - > /* PINCTRL - additions to nodes defined in sdm845.dtsi */ > &qup_spi0_default { > config {