Re: [PATCH 2/2] arm: dts: Add device-tree for Samsung Galaxy S5 (Exynos)

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 19/01/2023 19:58, Markuss Broks wrote:
> Samsung Galaxy S5 (Exynos) was sold alongside Samsung Galaxy S5
> with Snapdragon SoC, however the Exynos version features a 3G
> capable Intel modem instead of Qualcomm version featuring LTE modem.
> This phone is based on Exynos5422. Currently, the touchscreen,
> USB, eMMC and the PMIC are enabled in the device-tree.

Use subject prefixes matching the subsystem (which you can get for
example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
your patch is touching).

> 
> Signed-off-by: Markuss Broks <markuss.broks@gmail.com>
> ---
>  arch/arm/boot/dts/Makefile                   |   1 +
>  arch/arm/boot/dts/exynos5422-samsung-k3g.dts | 676 +++++++++++++++++++
>  2 files changed, 677 insertions(+)
>  create mode 100644 arch/arm/boot/dts/exynos5422-samsung-k3g.dts
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index c014f4fc53c0..b3aa4ad73d52 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -246,6 +246,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
>  	exynos5422-odroidxu3.dtb \
>  	exynos5422-odroidxu3-lite.dtb \
>  	exynos5422-odroidxu4.dtb \
> +	exynos5422-samsung-k3g.dtb \
>  	exynos5800-peach-pi.dtb
>  dtb-$(CONFIG_ARCH_GEMINI) += \
>  	gemini-dlink-dir-685.dtb \
> diff --git a/arch/arm/boot/dts/exynos5422-samsung-k3g.dts b/arch/arm/boot/dts/exynos5422-samsung-k3g.dts
> new file mode 100644
> index 000000000000..b1da32a6d41d
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos5422-samsung-k3g.dts
> @@ -0,0 +1,676 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Samsung Galaxy S5 (Exynos) device-tree source
> + *
> + * Copyright (c) 2023 Markuss Broks
> + */
> +
> +/dts-v1/;
> +#include <dt-bindings/clock/samsung,s2mps11.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/gpio/gpio.h>

Order these by name, so clock, gpio and then interrupt-controller.

> +#include "exynos5800.dtsi"
> +#include "exynos5422-cpus.dtsi"
> +
> +/ {
> +	model = "Samsung Galaxy S5 (Exynos)";

Samsung Galaxy S5 (GT-I.....)

This also applies to your binding patch. Do not introduce own style, use
existing style from other boards.

> +	compatible = "samsung,k3g", "samsung,exynos5800", \
> +			 "samsung,exynos5";

This does not look aligned.

> +
> +	chassis-type = "handset";
> +
> +	memory@20000000 {
> +		device_type = "memory";
> +		reg = <0x20000000 0x80000000>; /* 2 GiB */
> +	};
> +
> +	fixed-rate-clocks {
> +		oscclk {
> +			compatible = "samsung,exynos5420-oscclk";
> +			clock-frequency = <24000000>;
> +		};
> +	};
> +
> +	firmware@2073000 {
> +		compatible = "samsung,secure-firmware";
> +		reg = <0x02073000 0x1000>;
> +	};
> +
> +	tsp_vdd: tsp-vdd-en {

Generic node names, so regulator-tsp-vdd-en.

> +		compatible = "regulator-fixed";
> +		regulator-name = "tsp_vdd_en";> +		regulator-min-microvolt = <3300000>;
> +		regulator-max-microvolt = <3300000>;
> +		gpio = <&gpy3 5 0>;

Use GPIO flags.

> +		enable-active-high;
> +	};
> +
> +};
> +
> +&cpu0 {
> +	cpu-supply = <&buck2_reg>;
> +};
> +
> +&cpu4 {
> +	cpu-supply = <&buck6_reg>;
> +};
> +
> +&gpu {
> +	status = "okay";
> +	mali-supply = <&buck4_reg>;
> +};
> +
> +&hsi2c_7 {
> +	status = "okay";
> +
> +	pmic@66 {
> +		compatible = "samsung,s2mps11-pmic";
> +		reg = <0x66>;
> +
> +		interrupt-parent = <&gpx0>;
> +		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
> +		wakeup-source;
> +
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&s2mps11_irq>;
> +
> +		s2mps11_osc: clocks {
> +			compatible = "samsung,s2mps11-clk";
> +			#clock-cells = <1>;
> +			clock-output-names = "s2mps11_ap",
> +					"s2mps11_cp", "s2mps11_bt";

Misaligned.

> +		};
> +

Best regards,
Krzysztof